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DE-112022001552-B4 - SEMICONDUCTOR DEVICE

DE112022001552B4DE 112022001552 B4DE112022001552 B4DE 112022001552B4DE-112022001552-B4

Abstract

Semiconductor device (1), comprising: a semiconductor substrate (4, 15); a first electrically conductive element (25) formed above the semiconductor substrate (4, 15) and having a first linear section (36) extending along a major surface (11) of the semiconductor substrate (4, 15); and an organic insulating layer (55) formed over the semiconductor substrate (4, 15) and covering the first electrically conductive element (25), wherein the first linear section (36) includes a first side edge section (46) formed by a curve (47) which is alternately curved to one side and to the opposite side in a direction (Y1) which, in a top view, intersects a longitudinal direction (X1) of the first linear section (36). wherein the first electrically conductive element (25) includes a first base layer (26) and a first cover layer (27) which is stacked on the first base layer (26) such that it projects laterally from an end face (29) of the first base layer (26) in a cross-sectional view, and wherein the first side edge section (46) is selectively formed on the first cover layer (27).

Inventors

  • Eiji Kuwahara
  • Toru Higuchi
  • Daisuke SAKIZONO

Assignees

  • ROHM CO., LTD.

Dates

Publication Date
20260513
Application Date
20220127
Priority Date
20210317

Claims (11)

  1. Semiconductor device (1) comprising: a semiconductor substrate (4, 15); a first electrically conductive element (25) formed over the semiconductor substrate (4, 15) and having a first linear section (36) extending along a major surface (11) of the semiconductor substrate (4, 15); and an organic insulating layer (55) formed over the semiconductor substrate (4, 15) and covering the first electrically conductive element (25), the first linear section (36) including a first side-edge section (46) formed by a curve (47) that is alternately curved to one side and to the opposite side in a direction (Y1) that, in a top view, intersects a longitudinal direction (X1) of the first linear section (36). wherein the first electrically conductive element (25) includes a first base layer (26) and a first cover layer (27) stacked on the first base layer (26) such that it projects laterally from an end face (29) of the first base layer (26) in a cross-sectional view, and wherein the first side edge section (46) is selectively formed on the first cover layer (27).
  2. Semiconductor device (1) according to Claim 1 , wherein the first linear section (36) includes a base section (40) to which a connecting element can be connected, and a first side section (41) which includes a convex section (44, 48) projecting from the base section (40) in the direction (Y1) intersecting a longitudinal direction (X1) of the first linear section (36), and a concave section (45, 49) which is hollow with respect to the convex section (44, 48), and wherein the first side edge section (46) is formed by a curve (47) which, in a top view, continuously connects the convex section (44, 48) and the concave section (45, 49) along the longitudinal direction of the first linear section (36).
  3. Semiconductor device (1) according to Claim 2 , wherein the base section (40) is formed in a band shape with a first width (W2), and wherein the first width (W2) of the base section (40) is ten times or more than ten times the length of the extent (P1) of the projection of the convex section (44, 48) from the base section (40).
  4. Semiconductor device (1) according to one of the Claims 1 until 3 , wherein the first electrically conductive element (25) includes a front end section (39) which includes part of the first linear section (36) and a second linear section (37) which is connected to the first linear section (36) by a corner section (38), and wherein the first side edge section (46) is selectively formed on a linear section (36) which is one of the first linear section (36) and the second linear section (37).
  5. Semiconductor device (1) according to Claim 4 , wherein the front end section (39) of the first electrically conductive element (25) has a first side surface (52) formed in a top view by a first circular arc (51) with a first radius of curvature (R1), and wherein the first side edge section (46) of the first electrically conductive element (25) has a second side surface (54) formed in a top view by a second circular arc (53) with a second radius of curvature (R2) that is smaller than the first radius of curvature (R1).
  6. Semiconductor device (1) according to Claim 2 , wherein the organic insulation layer (55) has a pad opening (56) that exposes the base section (40) of the first linear section (36) as a pad (14).
  7. Semiconductor device (1) according to Claim 2 , further comprising a second electrically conductive element (59) connected to the base section (40) of the first linear section (36) in the organic insulating layer (55).
  8. Semiconductor device (1) according to Claim 7 , wherein the second electrically conductive element (59) has a third linear section (72) extending along the main surface (11) of the semiconductor substrate (4, 15), and wherein the third linear section (72) includes a second side edge section (79) formed by a curve (80) that is alternately curved to one side and to the opposite side in a direction (Y2) which, in a top view, intersects a longitudinal direction (X2) of the third linear section (72).
  9. Semiconductor device (1) according to Claim 8 , wherein the second electrically conductive element (59) includes a second base layer (60) and a second cover layer (61) which is stacked on the second base layer (60) such that it projects laterally from an end face (63) of the second base layer (60) in a cross-sectional view, and wherein the second side edge section (79) is selectively formed on the second cover layer (61).
  10. Semiconductor device (1) according to one of the Claims 1 until 9 , comprising an insulating layer layer structure (17) formed between the first electrically conductive element (25) and the semiconductor substrate (4, 15) and including at least a first inorganic insulating layer (18, 57) and a second inorganic insulating layer (19, 58) stacked on top of the first inorganic insulating layer (18, 57).
  11. Semiconductor device (1) according to one of the Claims 1 until 10 , comprising an integrated circuit element (16) formed on the semiconductor substrate (4, 15) and electrically connected to the first electrically conductive element (25).

Description

TECHNICAL AREA The present disclosure relates to a semiconductor device. State of the art For example, patent literature 1 discloses a semiconductor package that includes an electrically conductive element, a semiconductor device, a compound layer, and a sealing resin. The semiconductor device is a flip-chip LSI. The semiconductor device comprises an element body, a plurality of electrodes, and a front-side protective film. The front-side protective film is made of polyimide and covers a base section of the plurality of electrodes. List of objections Patent literature Patent literature 1: Japanese patent application publication no. JP 2020 - 167 330 A Furthermore, the printed text reveals US 2019 / 0 326 329 A1 An electronic device, in particular a flexible display device. This device comprises a substrate on which conductive elements and organic insulating layers are arranged. To improve mechanical reliability under bending, a conductive element has a corrugated or wavy edge. The printed matter WO 2015 / 030 891 A2 reveals a semiconductor structure with an electro-optical modulator. Brief description of the invention Technical problem There is a case in which a high mechanical residual stress occurs in a linear section of an electrically conductive element when a change in the ambient temperature of a structure occurs in which the electrically conductive element, such as a wiring conductor or an electrode, is covered with an organic insulating layer. This mechanical stress is thought to exert an external force on the adjacent organic insulating layer as the electrically conductive element expands or contracts due to the temperature change. A preferred embodiment of the present disclosure provides a semiconductor device capable of reducing the mechanical stress of a side section of a linear section of an electrically conductive element. Solution to the problem A semiconductor device according to a preferred embodiment of the present disclosure according to claim 1 includes a semiconductor substrate, a first electrically conductive element formed on the semiconductor substrate and having a first linear section extending along a major surface of the semiconductor substrate, and an organic insulating layer formed on the semiconductor substrate and covering the first electrically conductive element, wherein the first linear section includes a first side edge section formed by a curve that is alternately curved to one side and to an opposite side in a direction that intersects a longitudinal direction of the first linear section in a top view. Advantageous effects of the invention In the semiconductor device according to a preferred embodiment of the present disclosure, it is possible to reduce a mechanical stress (“stress”) of the side section of the linear section of the electrically conductive element. Brief description of the drawings [ 1 ] 1 is a schematic perspective view of a semiconductor device according to a preferred embodiment of the present disclosure.[ 2 ] 2 is an enlarged top view of a semiconductor chip of 1 .[ 3 ] 3 is an enlarged view (first form) of a part of 2 , which is surrounded by an alternating long and double short dashed line III.[ 4 ] 4 is a cross-sectional view along the in 3 Line IV-IV shown.[ 5 ] 5 is an enlarged view (second form) of a part defined by an alternating long and double short dashed line III of 2 is surrounded.[ 6 ] 6 is a cross-sectional view along the in 3 Line VI-VI shown.[ 7 ] 7 is a flowchart that depicts part of the manufacturing process of a semiconductor chip. 1 shows the sequence of the process steps.[ 8 ] 8 is a view to describe a voltage relaxation effect caused by the semiconductor device. Description of embodiments <Preferred embodiment of the present disclosure> First, a preferred embodiment of the present disclosure is described in a specified form. A semiconductor device (1) according to a preferred embodiment of the present disclosure includes a semiconductor substrate (4, 15), a first electrically conductive element (25) formed on the semiconductor substrate (4, 15) and having a first linear section (36) extending along a major surface (11) of the semiconductor substrate (4, 15), and an organic insulating layer (55) formed on the semiconductor substrate (4, 15) and covering the first electrically conductive element (25), wherein the first linear section (36) includes a first side edge section (46) formed by a curve (47) that is alternately curved to one side and to an opposite side in a direction that intersects a longitudinal direction of the first linear section (36) in a top view. There is a case in which a high stress is generated in the first side segment of the first linear section due to a difference in the coefficient of thermal expansion between the first electrically conductive element and the organic insulating layer when the ambient temperature changes, for example, when the first side segment of the first linear section is a straight line