DE-112023006483-T5 - Display field and display device

Abstract

A display field and a display device. The display field comprises a pixel driver circuit, the pixel driver circuit comprising a second transistor. The display field further comprises a base substrate, an auxiliary layer, and an active layer, the auxiliary layer being located on one side of the base substrate and connected to a first signal; the active layer being located on the side of the auxiliary layer facing away from the base substrate, and the active layer comprising a second active section, the second active section being used to form a channel region of the second transistor, and the orthographic projection of the auxiliary layer onto the base substrate covering the orthographic projection of the second active section onto the base substrate. In the display field, a provided auxiliary layer can prevent free charges in a lower layer from diffusing into a channel area of a second transistor at high temperature, thus avoiding the influence of the free charges on the properties of the second transistor and improving an abnormal display of the display field caused by the diffusion of free charges after a high-temperature reliability test.

Inventors

• Quanyong GU
• Tiaomei Zhang
• Ziyang YU
• Mengqi WANG
• Wenbo Chen
• Pan Zhao
• Erjin ZHAO
• ZhiLiang Jiang
• Ming Hu

Assignees

• BOE TECHNOLOGY GROUP CO., LTD.
• CHENGDU BOE OPTOELECTRONICS TECHNOLOGY CO., LTD.

Dates

Publication Date

20260513

Application Date

20230612

Claims (20)

1. Display field comprising a pixel driver circuit, wherein the pixel driver circuit includes a second transistor and a driver transistor, a first electrode of the second transistor being connected to a gate of the driver transistor, and the display field further comprising: a base substrate; an auxiliary layer located on one side of the base substrate and connected to a first signal; and an active layer located on a side of the auxiliary layer facing away from the base substrate, comprising: a second active section configured to form a channel region of the second transistor; and a third active section configured to form a channel region of the driver transistor; wherein an orthographic projection of the auxiliary layer onto the base substrate covers an orthographic projection of the second active section onto the base substrate and an orthographic projection of the third active section onto the base substrate.
2. Display field after Claim 1 , wherein the display field comprises a plurality of pixel driver circuits distributed in an array along a row direction and a column direction, the auxiliary layer comprises a plurality of auxiliary units distributed in an array along the row direction and the column direction, an auxiliary unit corresponding to a pixel driver circuit is provided, and the second active section comprises a third active subsection and a fourth active subsection; wherein the auxiliary unit comprises: a first auxiliary section, wherein an orthographic projection of the first auxiliary section on the base substrate covers the orthographic projection of the third active section on the base substrate; and a second auxiliary section, wherein an orthographic projection of the second auxiliary section on the base substrate covers an orthographic projection of the third active subsection on the base substrate and an orthographic projection of the fourth active subsection on the base substrate. ten active subsections on the base substrate.
3. Display field after Claim 2 , wherein the active layer further comprises: a tenth active section connected between the third active subsection and the fourth active subsection; wherein the orthographic projection of the second auxiliary section on the base substrate does not overlap with an orthographic projection of the tenth active section on the base substrate.
4. Display field after Claim 2 , wherein the active layer further comprises: a tenth active section connected between the third active subsection and the fourth active subsection; wherein the second auxiliary section comprises a first auxiliary subsection and a second auxiliary subsection, an orthographic projection of the first auxiliary subsection on the base substrate covers the orthographic projection of the third active subsection on the base substrate and the orthographic projection of the fourth active subsection on the base substrate, and an orthographic projection of the second auxiliary subsection on the base substrate covers an orthographic projection of the tenth active section on the base substrate.
5. Display field after Claim 4 , wherein the display field further comprises: a second conductive layer located on a side of the active layer facing away from the auxiliary layer and comprising: a first conductive block, wherein an orthographic projection of the first conductive block on the base substrate is superimposed on the orthographic projection of the tenth active section on the base substrate; a second source-drain metal layer located on a side of the second conductive layer facing away from the base substrate and comprising: a first current conductor, wherein an orthographic projection of the first current conductor on the base substrate runs along the slit direction, and the first current conductor is coupled to the first conductive block via a third through-hole; wherein the orthographic projection of the second auxiliary subsection on the base substrate further covers an orthographic projection of the third through-hole on the base substrate.
6. Display field after Claim 1 , wherein the active layer further comprises: a first active section connected to one side of the second active section, the first active section configured to form a channel region of the first transistor; the auxiliary unit further comprises: a fourth auxiliary section connected to the second auxiliary section, an orthographic projection of the fourth auxiliary section onto the base substrate covering an orthographic projection of the first active section onto the base substrate.
7. Display field after Claim 6 , wherein the first active section comprises a first active subsection and a second active subsection; and the active layer further comprises: a ninth active section connected between the first active subsection and the second active subsection; wherein the orthographic projection of the fourth auxiliary section on the base substrate further covers an orthographic projection of the ninth active section on the base substrate.
8. Display field after Claim 7 , wherein the pixel driver circuit further comprises a fourth transistor; the active layer further comprises: a fourth active section configured to form a channel region of the fourth transistor; the auxiliary unit further comprises: a third interconnect section connected between two auxiliary units adjacent in the column direction, wherein an orthographic projection of the third interconnect section on the base substrate runs along the column direction; and a sixth auxiliary section connected to the third interconnect section, wherein an orthographic projection of the sixth auxiliary section on the base substrate runs along the row direction and covers an orthographic projection of the fourth active section on the base substrate.
9. Display field after Claim 1 , wherein the auxiliary unit further comprises: a third connecting section that is connected between two auxiliary units adjacent in the column direction, and an orthographic projection of the third connecting section on the base substrate along the column direction; and a first connecting section that is connected to a side of the second auxiliary unit facing away from the first auxiliary section in the column direction, wherein in two auxiliary units adjacent in the column direction, a third connecting section of an auxiliary unit in a previous row is connected to a first connecting section of an auxiliary unit in a subsequent row, and an orthographic projection of the first connecting section The dungsabschnitts on the base substrate does not overlap with an orthographic projection of the first active section on the base substrate.
10. Display field after Claim 9 , wherein the first active section comprises a first active subsection and a second active subsection; and the active layer further comprises: a ninth active section connected between the first active subsection and the second active subsection; wherein the orthographic projection of the first connecting section on the base substrate does not overlap with an orthographic projection of the ninth active section on the base substrate.
11. Display field after Claim 9 , wherein the pixel driver circuit further comprises a fourth transistor; the active layer further comprises a fourth active section, and the fourth active section is configured to form a channel region of the fourth transistor; and the auxiliary unit further comprises: a third interconnect section connected between two auxiliary units adjacent in the column direction, and an orthographic projection of the third interconnect section on the base substrate along the column direction; and a sixth auxiliary section connected to the third interconnect section, and an orthographic projection of the sixth auxiliary section on the base substrate along the row direction, covering an orthographic projection of the fourth active section on the base substrate.
12. Display field after Claim 1 , wherein the pixel driver circuit further comprises a first transistor, and a second electrode of the first transistor is connected to the gate of the driver transistor; the active layer further comprises: a first active section connected to one side of the second active section, the first active section being configured to form a channel region of the first transistor; the auxiliary unit further comprises: a second interconnect section connected to both the first auxiliary section and the second auxiliary section, wherein an orthographic projection of the second interconnect section on the base substrate runs along the row direction, and two auxiliary units adjacent in the row direction are connected by the second interconnect section; a third interconnect section connected between two auxiliary units adjacent in the column direction, and an orthographic projection of the third interconnect section on the base substrate runs along the column direction; and a first connecting section or a fourth auxiliary section connected to a side of the second auxiliary section facing away from the first auxiliary section in the column direction, wherein in two auxiliary units adjacent in the column direction a third connecting section of an auxiliary unit in a previous row is connected to a first connecting section or a fourth auxiliary section of an auxiliary unit in a next row, an orthographic projection of the first connecting section on the base substrate does not overlap with an orthographic projection of the first active section on the base substrate, and an orthographic projection of the fourth auxiliary section on the base substrate covers the orthographic projection of the first active section on the base substrate.
13. Display field after Claim 1 , wherein the display field further comprises: a first source-drain metal layer and/or a second source-drain metal layer located on a side of the active layer facing away from the base substrate and comprising: a second power line and/or a first power line, wherein an orthographic projection of the second power line and/or the first power line runs along the column direction, and in a non-display area of the display field, the second power line and/or the first power line is connected to the auxiliary layer via a through-hole.
14. Display field after Claim 1 , wherein the display field further comprises: a second conductive layer located on a side of the active layer facing away from the base substrate and comprising: a first initialization signal line, wherein an orthographic projection of the first initialization signal line on the base substrate runs along the row direction; and a second initialization signal line, wherein an orthographic projection of the second initialization signal line on the base substrate runs along the row direction; a first source-drain metal layer located on a side of the second conductive layer facing away from the base substrate and comprising: a third initialization signal line, wherein an orthographic projection of the third initialization signal line on the base substrate runs along the column direction, and the third initialization signal line is connected to the first initialization signal line by a first through-hole; and/or a fourth initialization signal line, wherein an orthographic projection of the fourth initialization signal line on the base substrate runs along the column direction, and the fourth initialization signal line is connected to the second initialization signal line through a second through-hole.
15. Display field after Claim 14 , wherein the display field comprises a first pixel column and a second pixel column distributed sequentially and alternately in the row direction; and the orthographic projection of the third initialization signal line is located on the base substrate at least partially in an area where the second pixel column is located, the orthographic projection of the fourth initialization signal line is located on the base substrate in an area where the first pixel column is located, and both the first through-hole and the second through-hole are located in the first pixel column.
16. Display field after Claim 3 , wherein the pixel driver circuit further comprises a storage capacitor, a first electrode of the storage capacitor being connected to the gate of the driver transistor, and a second electrode of the storage capacitor being connected to a second power supply terminal; and the display field further comprises: a first conductive layer located on a side of the active layer facing away from the base substrate, and comprises: a second conductive block, wherein an orthographic projection of the second conductive block on the base substrate covers the orthographic projection of the third active section on the base substrate, and the second conductive block being configured to form the first electrode of the storage capacitor; a second conductive layer located on a side of the first conductive layer facing away from the base substrate, comprising: a third conductive block, wherein an orthographic projection of the third conductive block on the base substrate is arranged on the orthographic projection of the second conductive block on the base substrate, and the third conductive block is configured to form the second electrode of the storage capacitor; and a first conductive block, wherein an orthographic projection of the first conductive block on the base substrate is arranged on the orthographic projection of the tenth active section on the base substrate; a first source-drain metal layer located on a side of the second conductive layer facing away from the base substrate, comprising: a first power transmission line, which is connected via a through-hole to the third conductive block and further connected via a through-hole to a first conductive block in an adjacent pixel driver circuit; and a second power transmission line, each connected to the third conductive block via a through hole, and an extent length of an orthographic projection of the second power transmission line on the base substrate along the column direction is greater than an extent length of the first power transmission line on the base substrate along the column direction.
17. Display field after Claim 16 , wherein the first power transmission line comprises a first transmission section, a second transmission section, and a third transmission section, both an orthographic projection of the first transmission section on the base substrate and an orthographic projection of the third transmission section on the base substrate extend along the column direction, an orthographic projection of the second transmission section on the base substrate extends along the row direction, and the first transmission section and the third transmission section are connected by the second transmission section; and the first transmission section is connected via a through-hole to the third conductive block and the first power line, respectively, and the third transmission section is located in another pixel driver circuit adjacent in the row direction and is connected via a through-hole to the first conductive block.
18. Display field after Claim 17 , wherein the auxiliary unit further comprises: a second connecting section, which is connected to the first auxiliary section and the second auxiliary section respectively, wherein an orthographic projection of the second connecting section on the base substrate runs along the line direction, and two auxiliary units adjacent in the line direction are connected by the second connecting section; wherein an orthographic projection of the second transfer section on the base substrate partially overlaps with an orthographic projection of the second connecting section on the base substrate.
19. Display field after Claim 17 , wherein the first conductive layer further comprises: a gate signal line comprising a main extension section and an additional section, wherein an orthographic projection of the main extension section on the base substrate runs along the line direction and the orthographic The second conductive layer further comprises: a first initialization signal line, wherein an orthographic projection of the first initialization signal line runs along the row direction on the base substrate and covers the orthographic projection of the fourth active subsection on the base substrate, and a substructure of the gate signal line is configured to form a gate of the second transistor; the second conductive layer further comprises: a first initialization signal line, wherein an orthographic projection of the first initialization signal line runs along the row direction on the base substrate; the first source-drain metal layer further comprises: a third initialization signal line, wherein an orthographic projection of the third initialization signal line runs along the column direction on the base substrate, and the third initialization signal line is connected to the first initialization signal line via a through-hole; wherein a first overlap area is provided between the orthographic projection of the third transmission section on the base substrate and the orthographic projection of the main extension section on the base substrate, a second overlap area is provided between the orthographic projection of the third initialization signal line on the base substrate and the orthographic projection of the auxiliary section on the base substrate, and the orthographic projection of the second auxiliary section on the base substrate covers the first overlap area and the second overlap area.
20. Display field after Claim 16 , wherein the pixel driver circuit further comprises a fifth transistor, a gate of the fifth transistor connected to an enable signal line, a first electrode of the fifth transistor connected to a first power supply terminal, and a second electrode of the fifth transistor connected to a second electrode of the driver transistor; the active layer further comprises: a fifth active section configured to form a channel region of the fifth transistor; a sixteenth active section connected between the fifth active section and the third active section and configured to form the second electrode of the fifth transistor and the second electrode of the driver transistor; and a seventeenth active section connected to a side of the fifth active section facing away from the sixteenth active section and configured to form the first electrode of the fifth transistor; the first conductive layer further comprises: an enable signal line, wherein an orthographic projection of the enable signal line on the base substrate runs along the line direction and covers an orthographic projection of the fifth active section on the base substrate, and a substructure of the enable signal line is configured to form the gate of the fifth transistor; wherein the seventeenth active section is connected to the first current line via a through-hole.

Description

TECHNICAL AREA The present disclosure relates to the field of display technology and in particular to a display panel and a display device. BACKGROUND An organic light-emitting diode (OLED) is an active light-emitting display device and offers advantages such as self-illumination, wide viewing angle, high contrast, low power consumption, extremely high response speed, lightness and thinness, and flexibility. Currently, the application of OLED displays is becoming increasingly widespread. However, OLED displays have been found to have a color shift issue, as demonstrated in reliability tests. It should be noted that the information disclosed in the above background section is only intended to deepen the understanding of the background of the present disclosure and may therefore contain information of a related nature not known to the person skilled in the art in this field. SUMMARY One objective of the present disclosure is to overcome the aforementioned shortcomings of the prior art and to provide a display field and a display device. According to one aspect of the present disclosure, a display field is provided; the display field comprises a pixel driver circuit, the pixel driver circuit comprises a second transistor and a driver transistor, and a first electrode of the second transistor is connected to a gate of the driver transistor; the display field further comprises: a base substrate; an auxiliary layer located on one side of the base substrate and connected to a first signal; and an active layer located on a side of the auxiliary layer facing away from the base substrate, comprising: a second active section configured to form a channel region of the second transistor; and a third active section configured to form a channel region of the driver transistor; wherein an orthographic projection of the auxiliary layer onto the base substrate covers an orthographic projection of the second active section onto the base substrate and an orthographic projection of the third active section onto the base substrate. In an exemplary embodiment of the present disclosure, the display field comprises several pixel driver circuits distributed in an array along a row direction and a column direction; the auxiliary layer comprises several auxiliary units distributed in an array along the row direction and the column direction; one auxiliary unit is provided corresponding to a pixel driver circuit; the second active section comprises a third active subsection and a fourth active subsection; and the auxiliary unit comprises: a first auxiliary section whose orthographic projection on the base substrate covers the orthographic projection of the third active section on the base substrate; and a second auxiliary section whose orthographic projection on the base substrate covers, respectively, an orthographic projection of the third active subsection on the base substrate and an orthographic projection of the fourth active subsection on the base substrate. In an exemplary embodiment of the present disclosure, the active layer further comprises: a tenth active section connected between the third active subsection and the fourth active subsection; wherein the orthographic projection of the second auxiliary section on the base substrate does not overlap with an orthographic projection of the tenth active section on the base substrate. In an exemplary embodiment of the present disclosure, the active layer further comprises: a tenth active section connected between the third active subsection and the fourth active subsection; wherein the second auxiliary section comprises a first auxiliary subsection and a second auxiliary subsection, an orthographic projection of the first auxiliary subsection on the base substrate covers the orthographic projection of the third active subsection on the base substrate and the orthographic projection of the fourth active subsection on the base substrate, and an orthographic projection of the second auxiliary subsection on the base substrate covers an orthographic projection of the tenth active section on the base substrate. In an exemplary embodiment of the present disclosure, the display field further comprises: a second conductive layer located on a side of the active layer facing away from the base substrate, wherein the second conductive layer comprises a first conductive block, an orthographic projection of the first conductive block on the base substrate is arranged on the orthographic projection of the tenth active section on the base substrate; a second Source-drain metal layer located on a side of the second conductive layer facing away from the base substrate, wherein the second source-drain metal layer comprises a first current conductor, an orthographic projection of the first current conductor on the base substrate extends along the slit direction, and the first current conductor is coupled to the first conductive block by a third through-hole; wherein the orthographic projection of th