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DE-202026101647-U1 - Pixel structure, scoreboard and display device

DE202026101647U1DE 202026101647 U1DE202026101647 U1DE 202026101647U1DE-202026101647-U1

Abstract

Pixel structure, characterized in that it comprises several pixel groups (110) arranged in a matrix arrangement to form a matrix structure; wherein each pixel group (110) comprises a first chip (111), a second chip (112) and a third chip (113) in a ratio of 1:1:1 and in all pixel groups (110) in the same row the first chip (111), the second chip (112) and the third chip (113) have a common cathode; wherein in each pixel group (110) the first chip (111), the second chip (112) and the third chip (113) are each located at three vertices of a virtual equilateral triangle; wherein for two adjacent pixel groups (110) in the same row the first chip (111) and the third chip (113) of one of the two adjacent pixel groups (110) and the second chip (112) of the other pixel group (110) are each located at three vertices of a virtual equilateral triangle, and wherein the third chip (113) of one of the two adjacent pixel groups (110) and the first chip (111) and the second chip (112) of the other pixel group (110) are each located at three vertices of a virtual equilateral triangle; where, in all pixel groups (110) in the same column, the arrangement of the first chip (111), the second chip (112) and the third chip (113) is the same.

Assignees

  • LEDMAN OPTOELECTRONIC CO LTD

Dates

Publication Date
20260513
Application Date
20260324
Priority Date
20260324

Claims (10)

  1. Pixel structure, characterized in that it comprises several pixel groups (110) arranged in a matrix arrangement to form a matrix structure; wherein each pixel group (110) comprises a first chip (111), a second chip (112) and a third chip (113) in a numbered arrangement ratio of 1:1:1 and in all pixel groups (110) in the same row the first chip (111), the second chip (112) and the third chip (113) have a common cathode; wherein in each pixel group (110) the first chip (111), the second chip (112) and the third chip (113) are each located at three vertices of a virtual equilateral triangle; wherein for two adjacent pixel groups (110) in the same row, the first chip (111) and the third chip (113) of one of the two adjacent pixel groups (110) and the second chip (112) of the other pixel group (110) are each located at three vertices of a virtual equilateral triangle, and wherein the third chip (113) of one of the two adjacent pixel groups (110) and the first chip (111) and the second chip (112) of the other pixel group (110) are each located at three vertices of a virtual equilateral triangle; wherein for all pixel groups (110) in the same column, the arrangement of the first chip (111), the second chip (112) and the third chip (113) is the same.
  2. Pixel structure according to Claim 1 , characterized in that all pixel groups (110) of the same column of the matrix structure are arranged at equal intervals, and that a distance between two adjacent pixel groups (110) in the same row of the matrix structure is equal to a distance between two adjacent pixel groups (110) in the same column of the matrix structure.
  3. Pixel structure according to Claim 1 or 2 , characterized in that the first chip (111), the second chip (112) and the third chip (113) are each a red light-emitting chip, a blue light-emitting chip or a green light-emitting chip, and that the light emission colors of the first chip (111), the second chip (112) and the third chip (113) are each different from each other.
  4. Pixel structure according to one of the Claims 1 until 3 , characterized in that the number of the first chip (111), the second chip (112) and the third chip (113) in each pixel group (110) is one.
  5. Pixel structure according to one of the Claims 1 until 4 , characterized in that the first chip (111), the second chip (112) and the third chip (113) are each configured as a light-emitting chip in face-up mounting or as a light-emitting chip in flip-chip mounting.
  6. A display panel characterized in that it comprises a printed circuit board and a pixel structure, the pixel structure comprising several pixel groups (110) arranged in a matrix arrangement to form a matrix structure; wherein each pixel group (110) comprises a first chip (111), a second chip (112), and a third chip (113) in a numerical ratio of 1:1:1, and in all pixel groups (110) in the same row, the first chip (111), the second chip (112), and the third chip (113) share a common cathode; wherein the first chip (111), the second chip (112), and the third chip (113) are all located on the same side of the printed circuit board; wherein in each pixel group (110), the first chip (111), the second chip (112), and the third chip (113) are each located at three vertices of a virtual equilateral triangle; wherein for two adjacent pixel groups (110) in the same row, the first chip (111) and the third chip (113) of one of the two adjacent pixel groups (110) and the second chip (112) of the other pixel group (110) are each located at three vertices of a virtual equilateral triangle, and wherein the third chip (113) of one of the two adjacent pixel groups (110) and the first chip (111) and the second chip (112) of the other pixel group (110) are each located at three vertices of a virtual equilateral triangle; wherein for all pixel groups (110) in the same column, the arrangement of the first chip (111), the second chip (112) and the third chip (113) is the same.
  7. Display board after Claim 6 , characterized in that the printed circuit board comprises a common electrode (124), a first bonding area (121), a second bonding area (122) and a third bonding area (123); wherein the number of common electrodes (124) corresponds to the number of rows of the matrix structure and is assigned one-to-one to each row of the pixel groups (110), wherein the number of first bonding areas (121) corresponds to the number of first chips (111) and is assigned one-to-one, wherein the number of second bonding areas (122) corresponds to the number of second chips (112) and is assigned one-to-one, wherein the number of third bonding areas (123) corresponds to the number of third chips (113) and is assigned one-to-one; wherein in all pixel groups (110) in the same row the cathodes of the first chip (111), the second chip (112) and the third chip (113) are each connected to the corresponding common electrode (124), the anode of the first chip (111) is connected to the corresponding first bond area (121), the anode of the second chip (112) is connected to the corresponding second bond area (122) and the anode of the third chip (113) is connected to the corresponding third bond area (123).
  8. Display board after Claim 6 or 7 , characterized in that all pixel groups (110) in the same column of the matrix structure are arranged at equal intervals, and that a distance between two adjacent pixel groups (110) in the same row of the matrix structure is equal to a distance between two adjacent pixel groups (110) in the same column of the matrix structure.
  9. Scoreboard after one of the Claims 6 until 8 , characterized in that the first chip (111), the second chip (112) and the third chip (113) are each a red light-emitting chip, a blue light-emitting chip or a green light-emitting chip, and that the light emission colors of the first chip (111), the second chip (112) and the third chip (113) are each different from each other.
  10. Display device, characterized in that it displays the display board according to one of the Claims 6 until 9 includes.

Description

TECHNICAL AREA The present utility model relates to the technical field of display elements, in particular a pixel structure, a display board and a display device. STATE OF THE ART Virtual pixels use a software algorithm to control how light-emitting chips of each color ultimately contribute to the imaging of multiple adjacent pixels. This allows for higher resolution with fewer light sources, thus improving the display resolution. However, the pixel pitch of chip-on-board (COB) displays on the market is typically 2 mm. To improve the display's resolution, the pixel pitch must be reduced, which leads to a higher pixel count and therefore higher costs. CONTENTS OF THE PRESENT USE SAMPLE Based on this, it is necessary to provide a scoreboard and a display device to solve the problem that in traditional technology the distance between pixels has to be reduced, which leads to an increased use of pixels and consequently to higher costs. A pixel structure comprising multiple pixel groups arranged in a matrix to form a matrix structure; each pixel group contains a first chip, a second chip, and a third chip in the ratio of 1:1:1, with all first chips, second chips, and third chips in all pixel groups of the same row sharing a common cathode. In each of the pixel groups, the first chip, the second chip and the third chip are located at the three vertices of a virtual equilateral triangle. wherein for two adjacent pixel groups in the same row the first chip and the third chip of one pixel group as well as the second chip of the other pixel group are each located at three vertices of a virtual equilateral triangle, and wherein the third chip of one pixel group as well as the first chip and the second chip of the other pixel group are each located at three vertices of a virtual equilateral triangle; where, in all pixel groups in the same column, the arrangement of the first chip, the second chip, and the third chip is the same. The pixel structure described above, through time-controlled activation of the individual chips, allows a virtual pixel point to be formed after three chips at the three vertices of any virtual equilateral triangle have illuminated. This utilizes "virtual pixel" technology (i.e., the technique that generates more virtual pixels by temporally dividing and reusing real pixels, taking advantage of the afterimage effect of the human eye). Therefore, using this pixel structure, the scoreboard can achieve a higher resolution with the same number of chips compared to a scoreboard with real pixels, thus reducing production costs. Furthermore, the use of virtual pixel points can also reduce viewer fatigue. In one embodiment, all pixel groups in the same column of the matrix structure are evenly spaced, and the distance between two adjacent pixel groups in the same row in the matrix structure corresponds to the distance between two adjacent pixel groups in the same column in the matrix structure. In one embodiment, the first chip, the second chip, and the third chip are each one of red light-emitting chips, blue light-emitting chips, or green light-emitting chips, and the light emission colors of the first chip, the second chip, and the third chip are different. In one embodiment, the number of the first chip, the second chip, and the third chip in each pixel group is one. In one embodiment, the first chip, the second chip and the third chip each comprise light-emitting chips in face-up mounting or in flip-chip mounting. A display panel comprising a printed circuit board and a pixel structure, wherein the pixel structure comprises several pixel groups arranged in a matrix arrangement to form a matrix structure; each of the pixel groups comprises a first chip, a second chip and a third chip with a numerical ratio of 1:1:1, and all first chips, second chips and third chips in the same row of the pixel groups share a common cathode; the first chip, the second chip and the third chip are all located on the same side of the printed circuit board. In each of the pixel groups, the first chip, the second chip and the third chip are located at the three vertices of a virtual equilateral triangle. wherein for two adjacent pixel groups in the same row the first chip and the third chip of one pixel group as well as the second chip of the other pixel group are each located at three vertices of a virtual equilateral triangle, and wherein the third chip of one pixel group as well as the first chip and the second chip of the other pixel group are each located at three vertices of a virtual equilateral triangle; where, in all pixel groups in the same column, the arrangement of the first chip, the second chip, and the third chip is the same. In one embodiment, the printed circuit board comprises a common electrode, a first bonding area, a second bonding area, and a third bonding area. The number of common electrodes corresponds to the number of rows in the matrix structure and is assigned one-to-one to each row of the pix