EP-3806150-B1 - ELECTROSTATIC PROTECTION CIRCUIT, ARRAY SUBSTRATE AND DISPLAY DEVICE
Inventors
- LI, PAN
- QIAO, YONG
- HAO, Xueguang
Dates
- Publication Date
- 20260506
- Application Date
- 20190404
Claims (11)
- An electrostatic protection circuit, comprising: a first voltage line (VL1), applied with a first voltage; a second voltage line (VL2), applied with a second voltage, which is lower than the first voltage; and a switch assembly, comprising a plurality of first switch units (S11, S12, S13; S14, S15, S16) and a plurality of second switch units (S21, S22, S23; S24, S25, S26), characterized in that the plurality of first switch units (S11, S12, S13; S14, S15, S16) and the plurality of second switch units (S21, S22, S23; S24, S25, S26) are arranged along a straight line and have an active layer (AL1; AL2) in common, and the active layer (AL1; AL2) continuously extends along the straight line; the plurality of first switch units (S11, S12, S13; S14, S15, S16) are respectively coupled between a plurality of signal lines (SL1, SL2, SL3; SL4, SL5, SL6) of an array substrate and the first voltage line (VL1), and are turned on in response to negative static electricity on the signal lines (SL1, SL2, SL3; SL4, SL5, SL6); and the plurality of second switch units (S21, S22, S23; S24, S25, S26) are respectively coupled between the plurality of signal lines (SL1, SL2, SL3; SL4, SL5, SL6) and the second voltage line (VL2), and are turned on in response to positive static electricity on the signal lines (SL1, SL2, SL3; SL4, SL5, SL6), wherein the first switch unit (S11, S12, S13; S14, S15, S16) and the second switch unit (S21, S22, S23; S24, S25, S26) corresponding to a same signal line (SL1, SL2, SL3; SL4, SL5, SL6) are arranged adjacent to each other, wherein the first switch unit (S11, S12, S13; S14, S15, S16) and the second switch unit (S21, S22, S23; S24, S25, S26) corresponding to the same signal line (SL1, SL2, SL3; SL4, SL5, SL6) forms a switch unit group, and the switch unit group corresponding to the same signal line (SL1, SL2, SL3; SL4, SL5, SL6) is coupled to the signal line (SL1, SL2, SL3; SL4, SL5, SL6) through a same signal line-connecting line (SCL1, SCL2, SCL3; SCL4, SCL5, SCL6), wherein the switch unit groups adjacent to each other are arranged in such a way that the first switch units (S11, S12, S13; S14, S15, S16) are adjacent to each other or the second switch units (S21, S22, S23; S24, S25, S26) are adjacent to each other, wherein the first switch units (S11, S12, S13; S14, S15, S16) adjacent to each other are coupled to the first voltage line (VL1) through a same first voltage line-connecting line (VCL21), and the second switch units (S21, S22, S23; S24, S25, S26) adjacent to each other are coupled to the second voltage line (VL2) through a same second voltage line-connecting line (VCL11).
- The electrostatic protection circuit according to claim 1, wherein the plurality of signal lines (SL1, SL2, SL3; SL4, SL5, SL6) are arranged in a peripheral region of the array substrate.
- The electrostatic protection circuit according to claim 1 or 2, wherein the straight line along which the plurality of first switch units (S11, S12, S13; S14, S15, S16) and the plurality of second switch units (S21, S22, S23; S24, S25, S26) are arranged is arranged at a side of the plurality of signal lines (SL1, SL2, SL3, SL4, SL5, SL6).
- The electrostatic protection circuit according to claim 1 or 2, wherein the switch assembly comprises a first switch assembly and a second switch assembly; the first switch units (S11, S12, S13) and the second switch units (S21, S22, S23) of the first switch assembly are arranged along a first straight line; and the first switch units (S14, S15, S16) and the second switch units (S24, S25, S26) of the second switch assembly are arranged along a second straight line parallel to the first straight line.
- The electrostatic protection circuit according to claim 8, wherein the plurality of signal lines (SL1, SL2, SL3; SL4, SL5, SL6) comprise a plurality of first signal lines (SL1, SL2, SL3) and a plurality of second signal lines (SL4, SL5, SL6), the first straight line along which the first switch assembly is arranged and the second straight line along which the second switch assembly is arranged are arranged between the plurality of first signal lines (SL1, SL2, SL3) and the plurality of second signal lines (SL4, SL5, SL6).
- The electrostatic protection circuit according to claim 4, wherein at least one of the first switch units (S11, S12, S13) in the first switch assembly and at least one of the first switch units (S14, S15, S16) in the second switch assembly are coupled to the first voltage line (VL1) through a same first voltage line-connecting line (VCL21, VCL22), and at least one of the second switch units (S21, S22, S23) in the first switch assembly and at least one of the second switch units (S24, S25, S26) in the second switch assembly are coupled to the second voltage line (VL2) through a same second voltage line-connecting line (VCL11, VCL12).
- The electrostatic protection circuit according to any one of claims 1 to 6, wherein the first switch unit (S11, S12, S13; S14, S15, S16) comprises a first transistor and a second transistor connected in series, and the second switch unit (S21, S22, S23; S24, S25, S26) comprises a third transistor and a fourth transistor connected in series.
- The electrostatic protection circuit according to claim 7, wherein a first terminal of the first transistor is coupled to the signal line (SL1, SL2, SL3; SL4, SL5, SL6), and a gate and a second terminal of the first transistor are coupled to each other; a first terminal of the second transistor is coupled to the second terminal of the first transistor, and a second terminal and a gate of the second transistor are coupled to each other and are coupled to the first voltage line (VL1); a first terminal and a gate of the third transistor are coupled to each other and are coupled to the signal line (SL1, SL2, SL3; SL4, SL5, SL6); and a first terminal and a gate of the fourth transistor are coupled to each other and are coupled to a second terminal of the third transistor, and a second terminal of the fourth transistor is coupled to the second voltage line (VL2), wherein the first transistor, the second transistor, the third transistor, and the fourth transistor have the active layer (AL1; AL2) in common, and the active layer (AL1; AL2) is arranged along the straight line.
- An array substrate, comprising: a plurality of signal lines (SL1, SL2, SL3; SL4, SL5, SL6), arranged in a peripheral region of the array substrate; and the electrostatic protection circuit according to any one of claims 1 to 8, coupled to the plurality of signal lines (SL1, SL2, SL3; SL4, SL5, SL6).
- The array substrate according to claim 9, wherein the first voltage line (VL1) of the electrostatic protection circuit comprises a gate high-voltage signal line, and the second voltage line (VL2) of the electrostatic protection circuit comprises a gate low-voltage signal line.
- A display device, comprising the array substrate according to any one of claims 9 and 10.
Description
TECHNICAL FIELD The present disclosure generally relates to the field of display technologies, and more particularly, to an electrostatic protection circuit, an array substrate, and a display device. BACKGROUND At present, display devices such as liquid crystal displays and organic light emitting diode displays have been widely used. Such a display device includes a plurality of signal lines such as scan lines and data lines to drive a plurality of pixels of the display device, which are arranged in a matrix. When the display device is used, static electricity may be introduced into the display device along the signal lines, which may damage internal components of the display device. It is generally needed to arrange an electrostatic protection or electrostatic discharge (ESD) circuit in the display device to prevent the internal components of the display device from being damaged due to the static electricity introduced into the display device. Typically, such an electrostatic protection circuit is arranged in a peripheral region of an array substrate of the display device. In this case, if the electrostatic protection circuit occupies a larger area of the peripheral region of the array substrate, this is disadvantageous to narrow bezel design of the display device. Therefore, it has been expected to reduce the area occupied by the electrostatic protection circuit. It should be noted that, information disclosed in the above background portion is provided only for better understanding of the background of the present disclosure, and thus it may contain information that does not form the prior art known by those ordinary skilled in the art. Related art can be found in CN107479283A, US20130120334A1, US20140126094A1, US20150021595A1, CN107507827A and CN206271707U. SUMMARY Embodiments of the present disclosure relate to an electrostatic protection circuit, an array substrate, and a display device. The invention is set out in the appended set of claims. We also disclose an electrostatic protection circuit, including: a first voltage line, applied with a high level voltage; a second voltage line, applied with a low level voltage; and a switch assembly, including a plurality of first switch units and a plurality of second switch units arranged along a straight line and sharing an active layer. The plurality of first switch units are respectively coupled between a plurality of signal lines and the first voltage line, and are turned on in response to negative static electricity on the signal lines; and the plurality of second switch units are respectively coupled between the plurality of signal lines and the second voltage line, and are turned on in response to positive static electricity on the signal lines. According to some embodiments, the plurality of signal lines are arranged in a peripheral region of an array substrate. According to some embodiments, the straight line along which the plurality of first switch units and the plurality of second switch units are arranged is arranged at a side of the plurality of signal lines. According to the claimed invention, the first switch unit and the second switch unit corresponding to a same signal line are arranged adjacent to each other. According to the claimed invention, the first switch unit and the second switch unit corresponding to the same signal line forms a switch unit group, and the switch unit group corresponding to the same signal line is coupled to the signal line through a same signal line-connecting line. According to the claimed invention, the switch unit groups adjacent to each other are arranged in such a way that the first switch units are adjacent to each other or the second switch units are adjacent to each other. According to the claimed invention, the first switch units adjacent to each other are coupled to the first voltage line through a same first voltage line-connecting line, and the second switch units adjacent to each other are coupled to the second voltage line through a same second voltage line-connecting line. According to some embodiments, the switch assembly includes a first switch assembly and a second switch assembly; the first switch units and the second switch units of the first switch assembly are arranged along a first straight line; and the first switch units and the second switch units of the second switch assembly are arranged along a second straight line parallel to the first straight line. According to some embodiments, the plurality of signal lines include a plurality of first signal lines and a plurality of second signal lines, the first straight line along which the first switch assembly is arranged and the second straight line along which the second switch assembly is arranged are arranged between the plurality of first signal lines and the plurality of second signal lines. According to some embodiments, at least one of the first switch units in the first switch assembly and at least one of the first switch units in the