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EP-3875424-B1 - CMOS CAP FOR MEMS DEVICES

EP3875424B1EP 3875424 B1EP3875424 B1EP 3875424B1EP-3875424-B1

Inventors

  • ANG, Wan Chia
  • KROPELNICKI, PIOTR
  • OCAK, ILKER ENDER
  • PONTIN, PAUL SIMON

Dates

Publication Date
20260506
Application Date
20201215

Claims (15)

  1. A device (115) comprising: a substrate (201) prepared with a complementary metal oxide semiconductor (CMOS) region with CMOS devices and a sensor region with a micro-electro-mechanical system (MEMS) region with a MEMS component (250) comprising a thermoelectric IR sensor; a backend-of-line (BEOL) dielectric (270) covers the CMOS and MEMS region, wherein the BEOL dielectric (270) includes a plurality of intermetal dielectric (IMD) levels (271) formed by BEOL dielectric layers, which includes a via dielectric level (272) and a metal dielectric level (276), and wherein the BEOL dielectric (270) includes an upper cavity (265) which exposes the MEMS component (250) in the MEMS region; and a cap (280) comprising CMOS layers, wherein the CMOS layers are disposed on the BEOL dielectric (270) on the substrate (201) over the CMOS region and the MEMS region, the cap (280) is elevated over the MEMS region to provide the upper sensor cavity (265) between the cap (280) and the MEMS component (250), the cap is configured to be IR transparent , wherein the cap (280) comprises a base cap (281) having at least one base cap release opening (285), a seal cap (284) for sealing the at least one base cap release opening (285) in the base cap.
  2. The device (115) of claim 1 wherein the base cap (281) comprisesat least CMOS layer with at least one cap release opening (285), wherein the at least one CMOS layer is IR transparent.
  3. The device (115) of claim 1 or 2 wherein the seal cap (284) for sealing the cap release opening (285) in the base cap (281) includes at least one seal cap layer, the seal cap comprises an IR transparent seal cap.
  4. The device (115) of claim 3 wherein the seal cap (284) for sealing the cap release opening (285) in the base cap (281) includes at least one seal cap layer, the at least one seal cap comprises a non-IR transparent seal cap layer, the non-IR transparent seal cap layer comprises a patterned non-IR transparent seal cap layer to configure the cap to be IR transparent or at least one non-IR transparent seal cap layer and at least one IR transparent seal cap layer, the at least one seal non-IR transparent seal cap layer comprises a patterned non-IR transparent seal cap layer to configure the cap to be IR transparent , which does not prevent IR being transmitted to the sensors.
  5. The device (115) of any of the claims 2 to 4 wherein the base cap (281) comprises: a base cap stack with an odd number of CMOS base cap layers; and wherein the odd number of CMOS base cap layers comprises alternating silicon oxide and amorphous silicon layers in which a top base cap layer and a bottom base cap layer of the base cap stack comprise silicon oxide.
  6. The device (115) of any of the claims 1 to 5 wherein the bottom surface of the cap above the MEMS device region is planar.
  7. The device (115) of any of the claims 1 to 6 wherein the wherein the bottom surface of the cap above the MEMS device region is non-planar including a depression (286).
  8. The device (115) of any of the claims 1 to 7 wherein the MEMS component comprises an array of thermoelectric IR sensor cells; and the cap (280) comprises: an outer bearing wall (287) surrounding the MEMS region; and inner bearing walls (288), wherein the outer bearing wall (287) and inner bearing walls (288) are configured to form micro-casings surrounding the sensor cells.
  9. The device (115) of claim 8 wherein the base cap (280) comprises release openings for the micro-casings.
  10. The device (115) of the claim 8 or 9 wherein the inner bearing walls (288) comprise channels between adjacent sensor cells to provide homogeneous vacuum across the array of sensor cells.
  11. A method for forming a device (115) comprising: providing a substrate prepared with a complementary metal oxide semiconductor (CMOS) region with CMOS devices and a sensor region with a micro-electro-mechanical system (MEMS) region with a MEMS component (250) comprising a thermoelectric IR sensor; forming a backend-of-line (BEOL) dielectric (270) covering the CMOS and MEMS region, wherein the BEOL dielectric (270) includes a plurality of intermetal dielectric (IMD) levels (271) formed by BEOL dielectric layers, which includes a via dielectric level (272) and a metal dielectric level (276), and wherein the BEOL dielectric includes (270) an upper cavity (265) which exposes the MEMS component in the MEMS region; and forming a cap (280) on the BEOL dielectric(270) on the substrate (201) to encapsulate the MEMS region, wherein forming the cap comprises forming CMOS layers on the substrate by back-end-of-line (BEOL) processing, wherein the cap (280) is disposed over the CMOS region and the MEMS region, the cap (280) is elevated over the MEMS region to provide the upper cavity (265) between the cap and the MEMS component (250), wherein the cap(280) is configured to be IR transparent; and wherein forming the cap (280) comprises forming a base cap (281) which is IR transparent and includes at least one cap release opening (285), and a seal cap (284), the seal cap seals the at least one cap release opening (285) in the base cap (281).
  12. The method of claim 11 wherein forming the base cap (280) comprises forming at least one CMOS base cap dielectric layer with at least one cap release opening (285), the at least one CMOS base cap dielectric layer is IR transparent.
  13. The method of claim 11 or 12 wherein forming the seal cap (284) comprises forming at least one seal cap CMOS layer on the base cap, wherein the at least one seal cap CMOS layer comprises an IR-transparent seal cap CMOS layer.
  14. The method of claim 11 or 12 wherein forming the seal cap (284) comprises: forming at least one seal cap CMOS layer on the base cap (281), wherein the at least one seal cap CMOS layer comprises a non-IR transparent seal cap CMOS layer; and patterning the at least one non-IR transparent seal cap CMOS layer to configure the seal cap to be IR transparent, which does not prevent IR being transmitted to the sensors.
  15. The method of the claim 12, 13 or 14 wherein: the MEMS component comprises an array of thermoelectric IR sensor cells; and forming the cap (280) comprises forming an outer bearing wall (287) surrounding the MEMS region, and inner bearing walls (288), wherein the outer bearing wall (287) and inner bearing walls (288) are configured to form micro-casings surrounding the sensor cells.

Description

BACKGROUND The demand for uncooled infrared (IR) detectors is continually growing due to the increased demand from numerous applications. These applications, just to name a few, include air conditioning systems, handphones, autonomous driving cars, internet of things (loT), fire-fighting and traffic safety. Furthermore, it is expected that there will be numerous more applications in the near future. Conventional uncooled IR detectors have been implemented using microbolometers. However, microbolometers require mechanical components for calibration purposes. As an example, microbolometers require mechanical shutters for offset correction. The required mechanical components for microbolometers increases manufacturing complexity. Such complexity increases costs. In addition, the need for mechanical components for microbolometer makes it difficult to produce small or compact devices. The disclosure of US 2013/285165 A1 relates to a manufacturing method for hybrid integrated components having a very high degree of miniaturization, of which the hybrid integrated components each have at least two MEM elements each having at least one assigned ASIC element. The two MEMS/ASIC wafer stacks are initially created independently before they are mounted on top of each other. In document US 2004/245586 A1, a MEMS device and a method of manufacturing thereof is described. The MEMS device includes mechanical structures encapsulated in a chamber prior to final packaging and a contact area disposed at least partially outside of the chamber. The encapsulating material includes at least one of the following attributes: low tensile stress, good step coverage, maintains integrity during post-processing and does not adversely affect the performance characteristics of the mechanical structures. Document US 2019/027522 A1 discloses a device and method of forming thereof. The device includes a substrate with a transistor component in a transistor region, and an IR MEMS component disposed over a membrane in a hybrid region, and a cap, which is separated from the CMOS region by a vacuum, is bonded to the substrate by sealing layers, US 2015/243823 A1 describes a device formed using at least two separate wafers. One wafer includes an array of IR sensors, and another wafer serves as a cap over the sensors. The present disclosure is directed to cost-effective and compact IR detectors. SUMMARY Embodiments of the present disclosure generally relate to device and method of forming thereof. A device according to the invention is defined in claim 1. A method according to the invention is defined in claim 11. Various advantages and features of the embodiments herein disclosed, will become apparent through reference to the following description and the accompanying drawings. Furthermore, it is to be understood that the features of the various embodiments described herein are not mutually exclusive and can exist in various combinations and permutations. BRIEF DESCRIPTION OF THE DRAWINGS In the following description, the devices shown in figures 2a - 5d and the method of figures 8a - 8v are within the scope of the invention as defined by the independent claims. The accompanying drawings, which are incorporated in and form part of the specification in which like numerals designate like parts, illustrate preferred embodiments of the present disclosure and, together with the description, serve to explain the principles of various embodiments of the present disclosure, wherein Fig. 1shows a top view of a semiconductor wafer;Figs. 2a-bshow simplified cross-sectional views of embodiments of a device;Figs. 3a-bshow simplified cross-sectional views of alternative embodiments for internal bearing walls of CMOS in-situ caps in different numbers in the sensor region;Figs. 4a-bshow simplified cross-sectional views of alternative embodiments for sealing caps of CMOS in-situ caps in the sensor region;Figs. 5a-dshow simplified cross-sectional views of alternative embodiments of CMOS in-situ caps in the sensor region;Figs. 6a-dshow top views of various embodiments of layout or design for the getter layer, release openings and bearing walls;Figs. 7a-dshow top and cross-sectional views of various exemplary embodiments of thermopile structures;Fig. 7eshows an exemplary layout of a 2x3 sensor arrays;Figs. 8a-rshow simplified cross-sectional views of an exemplary process for forming a device;Figs. 8s-tshow simplified cross-sectional views of another process for forming a device;Figs. 8u-vshow simplified cross-sectional views of another process for forming a device;Fig. 9ashows an IR transmission graph of an embodiment of a cap; andFig. 9bshows a mechanical strength of an embodiment of a cap. DETAILED DESCRIPTION Embodiments generally relate to devices, for example, semiconductor devices or integrated circuits (ICs) with thermoelectric-based infrared (IR) detectors. The IC, for example, is a complementary metal oxide semiconductor (CMOS) device. As for the IR detector o