EP-3889636-B1 - RADAR SYSTEM AND CONTROL METHOD THEREFOR
Inventors
- ZHU, YAN
- CHEN, JIASHU
- HUANG, Leilei
- ZHOU, Wenting
Dates
- Publication Date
- 20260506
- Application Date
- 20190617
Claims (13)
- A radar system, comprising a plurality of radar units (2100) particularly arranged as an array, where each of the radar units (2100) comprises: one or more radio frequency (RF) channels, wherein each of the one or more RF channels is configured to receive a signal and generate an analog input signal according to the received signal; a processing module (2120) coupled to the one or more RF channels, wherein the processing module (2120) is configured to sample the analog input signal to obtain a digital signal and perform a first digital signal processing to the digital signal, thereby obtaining intermediate data, wherein the first digital signal processing comprises a first-dimensional fast Fourier transform, 1D-FFT, a second-dimensional fast Fourier transform, 2D-FFT, and target detection, wherein the plurality of radar units (2100) work jointly, wherein a designated radar unit (2100) among the plurality of radar units (2100) is configured to perform a second digital signal processing to a plurality of intermediate data provided by the plurality of radar units (2100), thereby obtaining result data of the radar system, wherein the second digital signal processing comprises angle detection, and characterised in that each of the plurality of radar units (2100) is configured to provide respective intermediate data after finishing respective target detection, only target addresses and corresponding 2D-FFT information acquired after the respective target detection are exchanged among the plurality of radar units (2100), and the angle detection is performed only in the designated radar unit on the target addresses and the corresponding 2D-FFT information provided by all radar units (2100).
- The radar system of claim 1, wherein in each of the radar units, the one or more RF channels comprises: one or more receiving antennas configured to obtain the signal; and a front-end module (2110) coupled to the one or more receiving antennas and configured to convert the signal to the analog input signal according to a local oscillator (LO) signal; and the processing module (2120) comprises: an analog-to-digital converter or ADC (2121), configured to obtain the digital signal by sampling the analog input signal according to a sampling clock (clk sample) signal; and a radar processor (2122) comprising 1st to Mth sub-processing units and storage units, the storage units being configured to store at least one of the intermediate data and the result data, the 1st to Kth sub-processing units being configured to implement the first digital signal processing, the k+lth to Mth sub-processing units being configured to implement the second digital signal processing, wherein M is a natural number greater than or equal to 2 and K is a natural number greater than or equal to 1 and less than M; the 1st to Mth sub-processing units are configured to respectively perform at least part of processes of the following data processing: Fourier transform, target detection, angle detection and point cloud imaging.
- The radar system of claim 2, wherein the one or more RF channels further comprises: one or more transmitting antennas configured to emit a transmitting signal according to the LO signal.
- The radar system of claim 1, wherein the plurality of radar units (2100) comprise a master radar unit (2100A) and a plurality of slave radar units (2100B), and wherein the master radar unit (2100A) is configured to generate and transmit a local oscillator (LO) signal and a sampling clock (clk sample) signal to the plurality of slave radar units (2100B).
- The radar system of claim 4, wherein the master radar unit (2100A) is cascaded with the plurality of slave radar units (2100) in sequence.
- The radar system of claim 5, wherein: each of the radar units (2100) that is not a last one in sequence is configured to provide for a next radar unit (2100) in sequence addresses corresponding to the intermediate data of the current radar unit (2100), or the addresses combined with addresses provided by a former radar unit (2100) in sequence, thereby obtaining final addresses in the last radar unit (2100); and each of the slave radar units (2100B) is configured to transmit the respective intermediate data in a direct manner or through a former slave radar unit (2100B) in sequence to the master radar unit (2100A), so that the master radar unit (2100A), as the designated radar unit (2100), generates the result data, or each of the radar units (2100) that is not a last one in sequence is configured to provide for a next radar unit (2100) in sequence addresses corresponding to the intermediate data of the current radar unit (2100), or the addresses combined with addresses provided by a former radar unit (2100) in sequence, and to transmit the intermediate data of the current radar unit (2100) and all the former radar units (2100) to the next radar unit (2100); and the last slave radar unit (2100B) in sequence, as the designated radar unit (2100), is configured to generate the result data according to the addresses provided by the former radar unit (2100) right before the last slave radar unit (2100B) and all the intermediate data provided by all the former radar units (2100) in sequence, or each of the radar units (2100) that is not a last one in sequence is configured to provide for a next radar unit (2100) in sequence the intermediate data of the current radar unit (2100), or the data combined with the intermediate data provided by a former radar unit (2100) in sequence; and the last slave radar unit (2100B) in sequence, as the designated radar unit (2100), is configured to generate the result data according to the data provided by the former radar unit (2100).
- The radar system of claim 1, wherein each of the radar units (2100) is implemented in an individual SoC chip, or each of the radar units realizes synchronization and data exchange through a bus structure (DATABUSO), in particular, the bus structure (DATABUSO) is arranged on the circuit board or in a chip encapsulation structure.
- A control method for a radar system that includes a plurality of radar units (2100), comprising: generating, by each of the radar units (2100) respectively, an analog input signal based on a received signal; generating, by each of the radar units (2100) respectively, a digital signal by sampling the analog input signal; performing, by each of the radar units (2100) respectively, a first digital signal processing to the digital signal, thereby obtaining intermediate data; wherein the first digital signal processing comprises a first-dimensional fast Fourier transform, 1D-FFT, a second-dimensional fast Fourier transform, 2D-FFT, and target detection, wherein the plurality of radar units (2100) work jointly, and the control method further comprises: performing, by a designated radar unit (2100), a second digital signal processing to a a plurality of intermediate data provided by the plurality of radar units (2100), thereby obtaining result data of the radar system, wherein the second digital signal processing comprises angle detection, and characterised in that each of the plurality of radar units (2100) provides respective intermediate data after finishing respective target detection, only target addresses and corresponding 2D-FFT information acquired after the respective target detection are exchanged among the plurality of radar units (2100), and the angle detection is performed only in the designated radar unit on the target addresses and the corresponding 2D-FFT information provided by all radar units (2100).
- The control method of claim 8, wherein each of the radar units (2100) respectively generates the analog input signal based on the received signal, and samples the analog input signal to obtain the corresponding digital signal, where steps in operations of each of the radar units include: converting the received signal to the analog input signal according to a local oscillator (LO) signal; and obtaining the corresponding digital signal by sampling the analog input signal according to a sampling clock (clk sample) signal.
- The control method of claim 9, further comprising: emitting a transmitting signal according to the LO signal.
- The control method of claim 9, wherein each of the radar units (2100) respectively includes 1st to Mth sub-processing units, wherein the 1st to Kth sub-processing units are used for implementing the first data processing and the k+1th to Mth sub-processing units are used for implementing the second data processing, wherein M is a natural number greater than or equal to 2 and K is a natural number greater than or equal to 1 and less than M, in particular, the 1 st to Mth sub-processing units respectively perform at least part of processes of the following data processing: Fourier transform, target detection, angle detection and point cloud imaging, in particular, the first data processing includes a first-dimensional fast Fourier transform or 1D-FFT, a second-dimensional fast Fourier transform or 2D-FFT and target detection.
- The control method of claim 9, wherein the plurality of radar units (2100) comprise a master radar unit (2100A) and a plurality of slave radar units (2100B), and wherein the master radar unit (2100A) generates and transmits the LO signal and the sampling clock (clk sample) signal to the plurality of slave radar units (2100B).
- The control method of claim 12, wherein the master radar unit (2100A) is cascaded with the plurality of slave radar units (2100B) in sequence; in particular, each of the radar units (2100) that is not the last one in a sequence provides for a next radar unit (2100) in sequence addresses corresponding to the intermediate data of the current radar unit (2100), or the addresses combined with addresses provided by a former radar unit (2100) in sequence, thereby obtaining final addresses in the last radar unit (2100); and each of the slave radar units (2100B) transmits the respective intermediate data in a direct manner or through a former slave radar unit (2100B) in sequence to the master radar unit (2100A), so that the master radar unit (2100A), as the designated radar unit, generates the result data; or each of the radar units (2100) that is not the last one in sequence provides for a next radar unit (2100) in sequence addresses corresponding to the intermediate data of the current radar unit (2100), or the addresses combined with the addresses provided by a former radar unit (2100) in sequence, and transmits the intermediate data of the current radar unit (2100) and all the former radar units (2100) to the next radar unit (2100); and the last slave radar unit (2100B) in sequence, as the designated radar unit (2100), generates the result data according to the addresses provided by the former radar unit (2100) right before the last slave radar unit (2100B) and all the intermediate data provided by the former radar units (2100) in sequence; or each of the radar units (2100) that is not the last one in sequence provides for a next radar unit (2100) in sequence the intermediate data of the current radar unit (2100), or the data combined with the intermediate data provided by a former radar unit (2100) in sequence; and the last slave radar unit (2100B) in sequence, as the designated radar unit (2100), generates the result data according to the data provided by the former radar unit (2100).
Description
CLAIM OF PRIORITY This application claims the priority of the Chinese patent application filed on November 29, 2018 with the application number 201811445465.2 and the invention titled "Radar System and Control Method Therefor". Field of the Invention The present invention relates to the field of radio communication, and more specifically, to a radar system and processing method thereof. Description of the Prior Art Existing radar systems generally include a processor and multiple radio frequency chips (or radio frequency modules) arranged in an array. In order to achieve synchronization of each radio frequency chip, the processor needs to provide a corresponding synchronization signal sync to each radio frequency chip. Each radio frequency chip obtains the received signal through the corresponding antenna, and converts the received signal into an intermediate frequency signal IF according to the synchronization signal sync. The processor performs signal processing on the intermediate frequency signal IF from each radio frequency chip, so as to parse and obtain the final data provided by the received signal. SUMMARY OF THE INVENTION The invention is set out in the appended set of claims. The present invention provides a radar system and a radar system control method. By distributing at least part of signal processing to each radar unit, the radar system and the control method thereof reduce the difficulty of development and the cost of implementation, enjoy the advantage of good scalability, and make it easier to integrate more RF channels in the radar system so as to build a large-scale radar system, thereby improving the detection range and the accuracy and resolution of the detection angle. It should be noted that embodiments of the invention are those whose scope is within that of the appended claims, and the implementations disclosed in this disclosure which do not fall under the scope of the appended claims are to be considered as examples for illustration. According to one aspect of the present invention, there is provided a radar system according to claim 1. According to another aspect of the present invention, there is provided a control method for the radar system according to claim 8. In the embodiments of the present invention, the radar system and the control method thereof replace the processor that processes data in a unified manner in the prior art, by distributing part or all of the signal processing among the radar units. Therefore, the requirement for the processing capability of each radar unit is relatively low, making the radar system have better scalability and reducing the implementation cost of the radar system. Accordingly, it is easy to increase the number of RF channels to build a large-scale radar system, which improves the detection range and the accuracy and resolution of the detection angle. Meanwhile, the structure of each radar unit is similar or identical, so the design time and the complexity of the system are greatly reduced when designing or extending the radar system. With no need to redesign different chips or modules separately, the radar system and the control method thereof boost the efficiency of design and reduces the cost and difficulty of design. In an alternative embodiment, each radar unit may be implemented in group or independently through an SoC chip, thereby enhancing the on-chip integration of the radar system. In some optional embodiments, the radar system and the control method thereof are of a simple structure, employing a transmission unit with a bus architecture to realize synchronization and data transmission among the radar units. In other embodiments, the radar system and the control method thereof employ a transmission unit with a master-slave structure, and divide signal processing into multiple parts, each of which can be performed in a single radar unit or executed separately in a plurality of radar units, thereby realizing the foregoing technical effects, as well as lowering the requirements for the processing capability of each radar unit. The radar system is more highly flexible with no need to configure a bus with strong data carrying capacity and transmission capability, further reducing the difficulty in extension and the cost of the radar system, thereby making it easier to improve the detection range and the accuracy and resolution of detection angle. BRIEF DESCRIPTION OF THE DRAWINGS By following description of embodiments with reference to the accompanying drawings of the present invention, the foregoing and other objects, features and advantages of the present invention will become apparent. FIG.1 shows a structural schematic diagram of a plurality of radar units in a radar system.FIG. 2 shows a flowchart of data processing by a processing module.FIG. 3 shows a schematic block diagram of a radar system according to an alternative embodiment of the present invention.FIG. 4 shows a schematic block diagram of a radar system according t