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EP-3940781-B1 - DISPLAY DEVICE AND METHOD FOR MANUFACTURING THE SAME

EP3940781B1EP 3940781 B1EP3940781 B1EP 3940781B1EP-3940781-B1

Inventors

  • PARK, JOON SEOK
  • OH, SAE ROON TER
  • LIM, JUN HYUNG
  • KIM, SU HYUN
  • CHOI, YOUNG JOON

Dates

Publication Date
20260506
Application Date
20210707

Claims (11)

  1. A display device comprising: a substrate (SUB); a light blocking layer (BML) of a driving transistor (T1) and an active layer (ACT2) of a switching transistor (T2) over the substrate (SUB); a buffer layer (BF1, BF2) over the light blocking layer (BML), the buffer layer (BF1, BF2) overlapping the light blocking layer (BML); an active layer (ACT1) of the driving transistor (T1) over the buffer layer (BF1, BF2); a first gate insulating layer (131) over the active layer (ACT1) of the driving transistor (T1) and the active layer (ACT2) of the switching transistor (T2); a first gate electrode (G1) over the first gate insulating layer (131) and overlapping the active layer (ACT1) of the driving transistor (T1); and a second gate electrode (G2) overlapping the active layer (ACT2) of the switching transistor (T2), wherein the light blocking layer (BML) and the active layer (ACT2) of the switching transistor (T2) are on a same layer, wherein the buffer layer (BF1, BF2) includes a first buffer layer (BF1) directly on the light blocking layer (BML), and a second buffer layer (BF2) over the first buffer layer (BF1), and wherein the first buffer layer (BF1) has a hydrogen concentration higher than that of the second buffer layer (BF2), characterized in that the light blocking layer (BML) and the active layer (ACT2) of the switching transistor (T2) include a same material, wherein each of the active layers (ACT1, ACT2) of the driving transistor (T1) and the switching transistor (T2) is formed of an oxide semiconductor containing at least one metal of indium, gallium, zinc, or tin.
  2. The display device of claim 1, wherein side surfaces of the buffer layer (BF1, BF2) are located more inward than side surfaces of the light blocking layer (BML), respectively.
  3. The display device of claim 2, wherein a side surface of the active layer (ACT1) of the driving transistor (T1) is aligned with a side surface of the buffer layer (BF1, BF2) in a thickness direction.
  4. The display device of claim 3, wherein a side surface of the first gate insulating layer (131) overlapping the active layer (ACT1) of the driving transistor (T1) is aligned with a side surface of the first gate electrode (G1) in a thickness direction.
  5. The display device of any one of claims 1 to 4, wherein the second buffer layer (BF2) includes silicon oxide, and the first buffer layer (BF1) includes silicon nitride or silicon oxynitride.
  6. The display device of claim 5, further comprising a barrier layer (BL) between the substrate (SUB) and the light blocking layer (BML), and between the substrate (SUB) and the active layer (ACT2) of the switching transistor (T2); optionally wherein the barrier layer (BL) has a hydrogen concentration lower than that of the first buffer layer (BF1); further optionally wherein the barrier layer (BL) includes silicon oxide.
  7. The display device of any one of claims 1 to 6, wherein the first gate insulating layer (131) has a hydrogen concentration lower than that of the first buffer layer (BF1).
  8. The display device of any one of claims 1 to 7, further comprising an interlayer insulating layer (140) over the first gate electrode (G1) and the second gate electrode (G2), wherein the interlayer insulating layer (140) has a hydrogen concentration higher than that of the second buffer layer (BF2); optionally further comprising: as electrodes over the interlayer insulating layer (140), a first source electrode (S1) connected to a first source region (SP1) of the active layer (ACT1) of the driving transistor (T1), a first drain electrode (D1) connected to a first drain region (DP1) of the active layer (ACT1) of the driving transistor (T1), a second source electrode (S2) connected to a second source region (SP2) of the active layer (ACT2) of the switching transistor (T2), and a second drain electrode (D2) connected to a second drain region (DP2) of the active layer (ACT2) of the switching transistor (T2); further optionally wherein the first source electrode (S1) is connected to the light blocking layer (BML).
  9. The display device of any one of claims 1 to 8, wherein a length of the active layer (ACT1) of the driving transistor (T1) is greater than a length of the active layer (ACT2) of the switching transistor (T2); optionally wherein a length of the light blocking layer (BML) is greater than a length of the active layer (ACT1) of the driving transistor (T1).
  10. A method for manufacturing a display device, the method comprising: sequentially stacking an active layer and a first buffer layer (BF1a) over a substrate (SUB) on which a first transistor region and a second transistor region separated from the first transistor region are defined, the first buffer layer (BF1a) being stacked directly on the active layer; forming a light blocking layer (BMLa) of the first transistor region and an active layer (ACT2a) of the second transistor region, by etching the active layer and the first buffer layer (BF1a), which have been sequentially stacked, in accordance with the respective transistor regions; forming a second buffer layer (BF2a) over the first buffer layer (BF1a); and after forming the second buffer layer (BF2a), forming an active layer (ACT1a) of the first transistor region over the second buffer layer (BF2a) so as to overlap the light blocking layer (BMLa), wherein the first buffer layer (BF1a) has a hydrogen concentration higher than that of the second buffer layer (BF2a), characterized in that the light blocking layer (BMLa) and the active layer (ACT2a) of the second transistor region include a same material, wherein each of the active layers (ACT1a, ACT2a) of the first transistor region and the second transistor region is formed of an oxide semiconductor containing at least one metal of indium, gallium, zinc, or tin.
  11. The method of claim10, further comprising: using a photoresist (PR) over the active layer (ACT1a) of the first transistor region, positioning a side surface of the second buffer layer (BF2a) more inward than a side surface of the light blocking layer (BMLa) in the first transistor region, and removing the first buffer layer (BF1a) and the second buffer layer (BF2a) from the second transistor region; optionally further comprising forming a first gate insulating layer (131, 132) and a gate electrode (G1, G2) to be sequentially stacked over an active layer (ACT1a, ACT2a) of each of the transistor regions; further optionally further comprising forming an interlayer insulating layer (140) over the gate electrode (G1, G2) of each of the transistor regions and performing a heat treatment to make the light blocking layer (BMLa) and the active layer (ACT2a) of the second transistor region conductive.

Description

CROSS-REFERENCE TO RELATED APPLICATION The present application claims priority to and the benefit of Korean Patent Application No. 10-2020-0084618 filed on July 9, 2020 in the Korean Intellectual Property Office. BACKGROUND 1. Field Aspects of embodiments of the present disclosure relate to a display device and a method for manufacturing the same. 2. Description of the Related Art With the advance of information-oriented society, more and more demands are placed on display devices for displaying images in various ways. Accordingly, display devices that have been researched in recent years include a liquid crystal display (LCD) device, a plasma display panel (PDP) device, an organic light emitting display (OLED) device, and a micro light emitting diode (micro LED) display device. An OLED device and the micro LED display device may include a light emitting diode, a first transistor for adjusting the amount of a driving current supplied from a power supply line to the light emitting diode depending on a voltage of a gate electrode, and a scan transistor for applying a data voltage of a data line to the gate electrode of the first transistor in response to a scan signal of a scan line. A driving voltage of the first transistor indicates the voltage applied to the gate electrode of the first transistor to flow the driving current. A driving voltage range of the first transistor indicates a voltage range of a first voltage, which may allow a predetermined minimum driving current to flow, to a second voltage which may allow a predetermined maximum driving current to flow. US2018061857 A1 discloses a display device including an insulating substrate, a first transistor including a first semiconductor layer of silicon and a first electrode, a first insulating layer provided above the first semiconductor layer, a second transistor including a second semiconductor layer of an oxide semiconductor, a second electrode and a conductive layer electrically connected to the second semiconductor layer, and a second insulating layer provided above the first insulating layer and the second semiconductor layer, the first electrode being electrically connected to the first semiconductor layer in a first hole, and the second electrode being in contact with the conductive layer in a second hole. EP3621112 A1 a display apparatus including: a first thin-film transistor (TFT) including a first semiconductor layer including a silicon semiconductor; a second TFT including a second semiconductor layer including an oxide semiconductor; a first shielding layer configured to overlap the first TFT and positioned between a substrate and the first TFT; and a second shielding layer configured to overlap the second TFT and positioned between the substrate and the second TFT. US2018061921 A1 discloses a semiconductor device including a base substrate, a first transistor disposed on the base substrate, the first transistor including a first input electrode, a first output electrode, a first control electrode, and a first semiconductor pattern including a crystalline semiconductor, a second transistor disposed on the base substrate, the second transistor including a second input electrode, a second output electrode, a second control electrode, and a second semiconductor pattern including an oxide semiconductor, a plurality of insulating layers disposed on the base substrate, and an upper electrode disposed on the first control electrode with at least one insulating layer of the plurality of insulating layers interposed between the upper electrode and the first control electrode. The upper electrode overlaps the first control electrode and forms a capacitor with the first control electrode. The above information disclosed in this Background section is only for enhancement of understanding of the background and therefore the information discussed in this Background section does not necessarily constitute prior art. SUMMARY Aspects of embodiments of the present disclosure may include a display device in which element characteristics of a driving transistor and a switching transistor of each of pixels are relatively improved. Aspects of embodiments of the present disclosure may also include a method for manufacturing a display device in which element characteristics of a driving transistor and a switching transistor of each of pixels are relatively improved. However, aspects of embodiments according to the present disclosure are not restricted to those set forth herein. The above and other aspects of embodiments according to the present disclosure will become more apparent to one of ordinary skill in the art to which the present disclosure pertains by referencing the detailed description of the present disclosure given below. According to an aspect, there is provided a display device as set out in claim 1. Additional features are set out in claims 2 to 9. According to an aspect, there is provided a method as set out in claim 10. Additional features are