EP-3985549-B1 - TEXTURE IMAGE ACQUISITION CIRCUIT, DISPLAY PANEL, AND TEXTURE IMAGE ACQUISITION METHOD
Inventors
- WANG, JIABIN
- WANG, YINGZI
- DING, XIAOLIANG
- CAO, Xueyou
- WANG, Wenjuan
- LIU, JING
- ZHANG, YICHI
- WANG, HAISHENG
- WANG, LEI
- LIU, YINGMING
Dates
- Publication Date
- 20260506
- Application Date
- 20190614
Claims (14)
- A texture image acquisition circuit (10) comprising a charge neutralization circuit (600) and a first acquisition circuit (100), wherein the charge neutralization circuit (600) is electrically connected to the first acquisition circuit (100), the charge neutralization circuit (600) is configured to receive a first control signal (CS1) to cause a current flowing through the first acquisition circuit (100) to be a first current, and the charge neutralization circuit (600) is further configured to receive a second control signal (CS2) to cause the current flowing through the first acquisition circuit (100) to be a second current, and a direction of the second current and a direction of the first current are opposite to each other; the first acquisition circuit (100) is configured to receive light from a texture and accumulate a first signal amount that is acquired through converting the light from the texture, so as to acquire a first acquisition value (DT1), the first acquisition circuit (100) comprises a first photosensitive component (110/PIN1), a first switch circuit (120) and a first integral calculation circuit (130); a first electrode of the first photosensitive component (110/PIN1) is connected to the charge neutralization circuit (600), a second electrode of the first photosensitive component (110/PIN1) is connected to a first end of the first switch circuit (120), and a second end of the first switch circuit (120) is connected to the first integral calculation circuit (130); the first photosensitive component (110/PIN1) is configured to receive the light from the texture and accumulate the first signal amount that is acquired through converting the light from the texture; the first switch circuit (120) is configured to be turned on so that the second electrode of the first photosensitive component (110/PIN1) is electrically connected to the first integral calculation circuit (130) through the first switch circuit (120), so that the first integral calculation circuit (130) receives the first signal amount and performs integral calculation on the first signal amount, so as to acquire the first acquisition value (DT1), and the first switch circuit (120) is further configured to be turned off so that the second electrode of the first photosensitive component (110/PIN1) is disconnected from the first integral calculation circuit (130).
- The texture image acquisition circuit (10) according to claim 1, wherein the charge neutralization circuit (600) is configured to provide a first voltage (V1) to the first electrode of the first photosensitive component (110/PIN1) when receiving the first control signal (CS1), and is configured to provide a second voltage (V2) to the first electrode of the first photosensitive component (110/PIN1) when receiving the second control signal (CS2); preferably, the first voltage (V1) is larger than the second voltage (V2).
- The texture image acquisition circuit (10) according to claim 2, wherein the charge neutralization circuit (600) comprises a first control transistor (CT1) and a second control transistor (CT2), a gate electrode of the first control transistor (CT1) is configured to receive the first control signal (CS1), a first electrode of the first control transistor (CT1) is configured to receive the first voltage (V1), and a second electrode of the first control transistor (CT1) is connected to the first electrode of the first photosensitive component (110/PIN1); a gate electrode of the second control transistor (CT2) is configured to receive the second control signal (CS2), a first electrode of the second control transistor (CT2) is connected to the first electrode of the first photosensitive component (110/PIN1), and a second electrode of the second control transistor (CT2) is configured to receive the second voltage (V2); the first switch circuit (120) comprises a first switch transistor (ST1), the first integral calculation circuit (130) comprises a first operational amplifier (OA1) and a first capacitor (C1), a gate electrode of the first switch transistor (ST1) is configured to receive a first scanning signal (GS1), a first electrode of the first switch transistor (ST1) is connected to the second electrode of the first photosensitive component (110/PIN1), and a second electrode of the first switch transistor (ST1) is connected to an inverting input terminal of the first operational amplifier (OA1); a non-inverting input terminal of the first operational amplifier (OA1) is configured to receive a reference voltage (Vref), and an output terminal of the first operational amplifier (OA1) is configured to output the first acquisition value (DT1); and a first electrode of the first capacitor (C1) is connected to the inverting input terminal of the first operational amplifier (OA1), and a second electrode of the first capacitor (C1) is connected to the output terminal of the first operational amplifier (OA1).
- The texture image acquisition circuit (10) according to claim 1, wherein the first electrode of the first photosensitive component (110/PIN1) is configured to receive a second voltage (V2), and the second electrode of the first photosensitive component (110/PIN1) is further electrically connected to the charge neutralization circuit (600); and the charge neutralization circuit (600) is configured to provide a third voltage (V3) to the second electrode of the first photosensitive component (110/PIN1) when receiving the first control signal (CS1); preferably, the third voltage (V3) is less than the second voltage (V2).
- The texture image acquisition circuit (10) according to claim 4, wherein the charge neutralization circuit (600) comprises a third control transistor (CT3), a gate electrode of the third control transistor (CT3) is configured to receive the first control signal (CS1), a first electrode of the third control transistor (CT3) is configured to receive the third voltage (V3), a second electrode of the third control transistor (CT3) is connected to the second electrode of the first photosensitive component (110/PIN1); the first switch circuit (120) comprises a first switch transistor (ST1), the first integral calculation circuit (130) comprises a first operational amplifier (OA1) and a first capacitor (C1), a gate electrode of the first switch transistor (ST1) is configured to receive a first scanning signal (GS1), a first electrode of the first switch transistor (ST1) is connected to the second electrode of the first photosensitive component (110/PIN1), and a second electrode of the first switch transistor (ST1) is connected to an inverting input terminal of the first operational amplifier (OA1); a non-inverting input terminal of the first operational amplifier (OA1) is configured to receive a reference voltage (Vref), and an output terminal of the first operational amplifier (OA1) is configured to output the first acquisition value (DT1); and a first electrode of the first capacitor (C1) is connected to the inverting input terminal of the first operational amplifier (OA1), and a second electrode of the first capacitor (C1) is connected to the output terminal of the first operational amplifier (OA1).
- The texture image acquisition circuit (10) according to claim 1, wherein a first electrode of the first photosensitive component (110/PIN1) is configured to receive a second voltage (V2), and the first integral calculation circuit (130) is further electrically connected to the charge neutralization circuit (600), and the charge neutralization circuit (600) is configured to provide a third voltage (V3) to the first integral calculation circuit (130) when receiving the first control signal (CS1), and is configured to provide a reference voltage (Vref) to the first integral calculation circuit (130) when receiving the second control signal (CS2); preferably, the third voltage (V3) is less than the second voltage (V2), and the reference voltage (Vref) is larger than the second voltage (V2).
- The texture image acquisition circuit (10) according to claim 6, wherein the charge neutralization circuit (600) comprises a fourth control transistor and a fifth control transistor, the first switch circuit (120) comprises a first switch transistor (ST1), the first integral calculation circuit (130) comprises a first operational amplifier (OA1) and a first capacitor (C1); a gate electrode of the fourth control transistor is configured to receive the first control signal (CS1), a first electrode of the fourth control transistor is configured to receive the third voltage (V3), and a second electrode of the fourth control transistor is connected to a non-inverting input terminal of the first operational amplifier (OA1); a gate electrode of the fifth control transistor is configured to receive the second control signal (CS2), a first electrode of the fifth control transistor is configured to receive the reference voltage (Vref), and a second electrode of the fifth control transistor is connected to the non-inverting input terminal of the first operational amplifier (OA1); a gate electrode of the first switch transistor (ST1) is configured to receive a first scanning signal (GS1), a first electrode of the first switch transistor (ST1) is connected to the second electrode of the first photosensitive component (110/PIN1), and a second electrode of the first switch transistor (ST1) is connected to an inverting input terminal of the first operational amplifier (OA1); an output terminal of the first operational amplifier (OA1) is configured to output the first acquisition value (DT1); and a first electrode of the first capacitor (C1) is connected to the inverting input terminal of the first operational amplifier (OA1), and a second electrode of the first capacitor (C1) is connected to the output terminal of the first operational amplifier (OA1).
- The texture image acquisition circuit (10) according to claim 1, further comprising a reference acquisition circuit (400), wherein the reference acquisition circuit (400) is electrically connected to the charge neutralization circuit (600), is configured not to receive light from the texture, and is configured to take a signal amount of the first current as a reference signal amount and accumulate the reference signal amount to acquire a first reference value (DTR).
- The texture image acquisition circuit (10) according to claim 8, wherein the reference acquisition circuit (400) comprises a reference photosensitive component (410), a reference switch circuit (420) and a reference integral calculation circuit (430); a second electrode of the reference photosensitive component (410) is connected to the reference switch circuit (420), and the reference switch circuit (420) is further connected to the reference integral calculation circuit (430); the reference photosensitive component (410) is configured not to receive light from the texture, and is configured to take the signal amount of the first current as the reference signal amount; the reference integral calculation circuit (430) is configured to receive the reference signal amount and perform integral calculation on the reference signal amount to acquire the first reference value (DTR).
- The texture image acquisition circuit (10) according to claim 9, wherein the reference photosensitive component (410) and the first photosensitive component (110/PIN1) are of a same type of photosensitive component; preferably, the reference switch circuit (420) comprises a reference switch transistor (STR), the reference integral calculation circuit (430) comprises a reference operational amplifier (OAR) and a reference capacitor (CR), a gate electrode of the reference switch transistor (STR) is configured to receive a scanning signal, a first electrode of the reference switch transistor (STR) is connected to a second electrode of the reference photosensitive component (410), and a second electrode of the reference switch transistor (STR) is connected to an inverting input terminal of the reference operational amplifier (OAR); an output terminal of the reference operational amplifier (OAR) is configured to output the first reference value (DTR); and a first electrode of the reference capacitor (CR) is connected to the inverting input terminal of the reference operational amplifier (OAR), and a second electrode of the reference capacitor (CR) is connected to the output terminal of the reference operational amplifier (OAR).
- The texture image acquisition circuit (10) according to any one of claims 1-10, further comprising a second acquisition circuit (200), wherein the charge neutralization circuit (600) is electrically connected to the second acquisition circuit (200), the charge neutralization circuit (600) is further configured to receive the first control signal (CS1) to cause a current flowing through the second acquisition circuit (200) to be the first current, and the charge neutralization circuit (600) is further configured to receive the second control signal (CS2) to cause the current flowing through the second acquisition circuit (200) to be a third current, a direction of the third current and the direction of the first current are opposite to each other; and the second acquisition circuit (200) is configured to receive the light from the texture and accumulate a second signal amount that is acquired through converting the light from the texture, so as to acquire a second acquisition value (DT2).
- A display panel (1), comprising a display region (810), the display region (810) comprising a texture recognition region (811), characterized in that , a plurality of pixel units arranged in an array in the display region (810), and the pixel units in the texture recognition region (811) each comprise the texture image acquisition circuit (10) according to any one of claims 1-11.
- The display panel (1) according to claim 12, further comprising a processing circuit (500), wherein the processing circuit (500) is electrically connected to the first acquisition circuit (100), and is configured to process the first acquisition value (DT1), so as to acquire an image of the texture; preferably, the texture image acquisition circuit (10) further comprises a reference acquisition circuit (400), and the reference acquisition circuit (400) is connected to the charge neutralization circuit (600) and is configured not to receive the light from the texture, and is configured to take a signal amount of the first current as a reference signal amount and accumulate the reference signal amount to acquire a first reference value (DTR); and the processing circuit (500) is further electrically connected to the reference acquisition circuit (400), and is configured to perform a processing operation according to the first acquisition value (DT1) and the first reference value (DTR) to acquire an image of the texture.
- A texture image acquisition method for the texture image acquisition circuit (10) according to any one of claims 1-7, the texture image acquisition method comprising: during a charge neutralization period (P1), allowing the charge neutralization circuit (600) to receive the first control signal (CS1) to cause the current flowing through the first acquisition circuit (100) to be the first current after completing the acquisition of the previous frame of a texture image and before the acquisition of the next frame of the texture image; during an acquisition period (P2), allowing the charge neutralization circuit (600) to receive the second control signal (CS2) to cause the current flowing through the first acquisition circuit (100) to be the second current during the acquisition of the next frame of the texture image, wherein the direction of the second current and the direction of the first current are opposite to each other; and allowing the first acquisition circuit (100) to receive light from a texture and to accumulate a first signal amount that is acquired by converting the light from the texture, so as to acquire a first acquisition value (DT1) which is used to acquire the texture image.
Description
TECHNICAL FIELD Embodiments of the present disclosure relate to a texture image acquisition circuit, a display panel and a texture image acquisition method. BACKGROUND With the growing popularity of mobile terminals, more and more users use mobile terminals for authentication, electronic payment and other operations. Because of the uniqueness of a skin texture such as a fingerprint pattern or a palmprint pattern, fingerprint recognition technology combined with optical imaging is gradually adopted by mobile electronic devices for authentication, electronic payment, etc. How to improve the accuracy of texture recognition is a focus in the art. D1 (US 20180164950A1) discloses a touch display device, a touch sensing system, and a touch sensing method. More specifically, touch information (fingerprint information or touch position information) may be acquired in response to current flowing in a data line through a touch sensing mode period that includes: a first period in which an optical sensor, the opposite ends of which are connected to a source node and a drain node of a switching transistor, is disposed in a pixel region, a gate signal of a turn-on level voltage is supplied to a gate line and a driving voltage is supplied to the data line; and a second period in which a gate signal of a turn-off level voltage is supplied to the gate line, a reference voltage is supplied to the data line, and an optical sensor is irradiated with light. According to the present disclosure, it is possible to accurately sense a touch position and/or a fingerprint in an optical manner using an optical sensor without being influenced by parasitic capacitance. SUMMARY At least one embodiment of the present disclosure provides a texture image acquisition circuit, including a charge neutralization circuit and a first acquisition circuit, the charge neutralization circuit is electrically connected to the first acquisition circuit, the charge neutralization circuit is configured to receive a first control signal to cause a current flowing through the first acquisition circuit to be a first current, and the charge neutralization circuit is configured to receive a second control signal to cause a current flowing through the first acquisition circuit to be a second current, a direction of the second current and a direction of the first current being opposite to each other; the first acquisition circuit is configured to receive light from a texture and accumulate a first signal amount that is acquired through converting the light from the texture, so as to acquire a first acquisition value; the first acquisition circuit includes a first photosensitive component, a first switch circuit and a first integral calculation circuit; a first electrode of the first photosensitive component is connected to the charge neutralization circuit, a second electrode of the first photosensitive component is connected to a first end of the first switch circuit, and a second end of the first switch circuit is connected to the first integral calculation circuit; the first photosensitive component is configured to receive the light from the texture and accumulate the first signal amount that is acquired through converting the light from the texture; the first switch circuit is configured to be turned on so that the second electrode of the first photosensitive component is electrically connected to the first integral calculation circuit through the first switch circuit, so that the first integral calculation circuit receives the first signal amount and perform integral calculation on the first signal amount, so as to acquire the first acquisition value; and the first switch circuit is further configured to be turned off so that the second electrode of the first photosensitive component is disconnected from the first integral calculation circuit. For example, in the texture image acquisition circuit provided by an embodiment of the present disclosure, a first electrode of the first photosensitive component is configured to be connected to the charge neutralization circuit; the charge neutralization circuit is configured to provide a first voltage to the first electrode of the first photosensitive component when receiving the first control signal, and is configured to provide a second voltage to the first electrode of the first photosensitive component when receiving the second control signal. For example, in the texture image acquisition circuit provided by an embodiment of the present disclosure, the first voltage is larger than the second voltage. For example, in the texture image acquisition circuit provided by an embodiment of the present disclosure, the charge neutralization circuit includes a first control transistor and a second control transistor, a gate electrode of the first control transistor is configured to receive the first control signal, a first electrode of the first control transistor is configured to receive the first voltage, and a second el