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EP-4057338-B1 - METAL SUBSTRATE STRUCTURE AND METHOD OF MANUFACTURING A METAL SUBSTRATE STRUCTURE FOR A SEMICONDUCTOR POWER MODULE AND SEMICONDUCTOR POWER MODULE

EP4057338B1EP 4057338 B1EP4057338 B1EP 4057338B1EP-4057338-B1

Inventors

  • GUILLON, David
  • BEYER, HARALD
  • EHRBAR, Roman

Dates

Publication Date
20260506
Application Date
20210310

Claims (11)

  1. A method of manufacturing a metal substrate structure (10) for a semiconductor power module according to one of the claims 3 to 11, comprising: - providing a metal top layer (11) having at least one recess which is limited by an edge (14) of the metal top layer (11), wherein the metal top layer (11) further comprises at least one stress relief structure in an area adjacent to the edge (14) formed by at least one of stamping, etching and cutting, wherein the stress relief structure comprises a structured edge surface (17) formed as predetermined roughness of a surface (141, 142, 143) of the metal top layer (11) with a plurality of protrusions, - providing a metal bottom layer (13), - providing a dielectric layer (12), - coupling the layers (11, 12, 13) together such that the dielectric layer (12) is coupled with both the metal top layer (11) and the metal bottom layer (13) in between.
  2. The method according to claim 1, wherein the steps of providing and coupling the dielectric layer (12) comprises: - providing a pumpable substance, - aligning the metal top layer (11) and the metal bottom layer (13) relative to each other with a predetermined distance in between, and - bringing in the pumpable substance between the aligned metal top layer (11) and the metal bottom layer (13) and thus forming the dielectric layer (12) by means of molding.
  3. A metal substrate structure (10) for a semiconductor power module, comprising: - a metal top layer (11) having at least one recess which is limited by an edge (14) of the metal top layer (11), wherein the metal top layer (11) further comprises at least one stress relief structure in an area adjacent to the edge (14) formed by means of at least one of stamping, etching and cutting, - a metal bottom layer (13), and - a dielectric layer (12) which is coupled with both the metal top layer (11) and the metal bottom layer (13) and formed in between with respect to a stacking direction (A), wherein the stress relief structure comprises a structured edge surface (17) formed as predetermined roughness of a surface (141, 142, 143) of the metal top layer (11) with a plurality of protrusions.
  4. The metal substrate structure (10) according to claim 3, wherein the edge (14) is at least partially embedded or covered by the dielectric layer (12).
  5. The metal substrate structure (10) according to one of the claims 3 or 4, wherein the stress relief structure is formed on at least one of: - a top surface (141), a side surface (142) and a bottom surface (143) of the metal top layer (11).
  6. The metal substrate structure (10) according to one of the claims 3-5, wherein the stress relief structure comprises a thinned edge (15) formed as a thickness reduction of the metal top layer (11) with respect to the stacking direction (A).
  7. The metal substrate structure (10) according to one of the claims 3-6, wherein the stress relief structure comprises at least one of an oblique edge (16) and a beveled side surface (142) of the metal top layer (11) with respect to the stacking direction (A).
  8. The metal substrate structure (10) according to claim 7, wherein the at least one of the oblique edge (16) and the beveled side surface (142) of the metal top layer (11) comprises a convex or concave shape with respect to a cross section.
  9. The metal substrate structure (10) according to one of the claims 3-8, wherein the stress relief structure comprises a recess formed as a dimple (18) on a surface (141, 142, 143) of the metal top layer (11).
  10. The metal substrate structure (10) according to one of the claims 3-9, wherein the stress relief structure comprises a recess formed as a groove (19) on a surface (141, 142, 143) of the metal top layer (11).
  11. A semiconductor power module (1) for a semiconductor device, comprising: - a metal substrate structure (10) according to one of the claims 3-10, and - electronics (2) which is coupled with the metal top layer (11) of the metal substrate structure (10).

Description

The present disclosure is related to a metal substrate structure for a semiconductor power module and a semiconductor power module for a semiconductor device. The present disclosure is further related to a corresponding manufacturing method for a metal substrate structure. Conventional insulated metal substrates form technology for low and medium power semiconductor packages with low insulation requirements and low thermal resistance simultaneously. Document JP 2014 090103 A discloses a molded package that includes an insulating sheet. The insulating sheet comprises a bottom layer on one side and extends between islands on the other side. Both, the bottom layer and the islands can be made of metal. The insulating sheet further comprise a resin sheet between the bottom layer and the islands to counteract a short circuit. Document EP 1 909 324 A1 discloses a lead frame partially having different thicknesses. On a thick portion of lead frame, a special electronic component, such as an LED, for which a high current and heat radiation are required is mounted. Document JP 2014 112640 A discloses a semiconductor device that comprises a metal substrate and an electrically insulating lower layer resin which lies on the metal substrate and is thermally cured. The semiconductor device further comprises an upper layer resin which lies on the lower layer resin and is thermally cured and a lead frame which lies on the upper layer resin. Further semiconductor devices are described in the document EP 2 006 909 A2 and US 2016/315023 A1. In this respect, it is a challenge to provide a stable metal substrate with reliable functionality. Embodiments of the disclosure relate to a stable metal substrate structure for a semiconductor power module that enables reliable functioning and contributes to an enhanced module life. Further embodiments relate to a corresponding semiconductor power module for a semiconductor device and a manufacturing method for such a metal substrate structure. These objects are achieved by the subject-matter of the independent claims. Further developments and embodiments are described in the dependent claims. According to an embodiment, a metal substrate structure for a semiconductor power module comprises a metal top layer having at least one recess which is limited by an edge of the metal top layer, wherein the metal top layer further comprises at least one stress relief structure in an area adjacent to the edge formed by means of at least one of stamping, etching and cutting. The metal substrate structure further comprises a metal bottom layer and a dielectric layer which is coupled with both the metal top layer and the metal bottom layer and formed in between with respect to a stacking direction. The stress relief structure comprises a structured edge surface formed as predetermined roughness of a surface of the metal top layer with a plurality of protrusions. The dielectric layer comprises a resin material, for example. By use of the described molded metal substrate structure a semiconductor power module is feasible that enables reliable functioning and an enhanced lifetime even for use in high voltage power module applications with a voltage of at least 0.5 kV, for example. The described metal substrate structure realizes a power module insulated metal substrate including a predetermined circuit metallization structure with stress relief pattern, for example. The stress relief structure also serves as an anchoring structure for improved adhesion between the metal top layer and the dielectric layer. In addition, the metal substrate structure contributes to an enhanced mechanical stability. Both can contribute to an improved high voltage capability and with respect to partial discharge, for example. The described configuration of the metal substrate structure can also contribute to beneficial functionality in view of medium or low voltage and low cost applications. It is a recognition in connection with the present disclosure that edges of pattern of circuit metallization are exposed to mechanical and thermo-mechanical stress and may cause voids or cracks which can finally lead to delamination between metallization and a resin sheet and which may result in partial discharge and dielectric breakdown. The stress relief structure of the described metal substrate structure is specifically formed in the area of the edge to absorb or dissipate forces due to mechanical or thermos-mechanical stress, for example. Moreover, a reduction of stress caused by comparably stiff metal can be achieved by the stress relief structure. Alternatively or additionally, the stress relief structure contributes to improve the adhesion between the metal pattern of the metal top layer and the isolating resin of the dielectric layer. Thus, the stress relief structure, for instances comprising one or more stress relief features, is incorporated intentionally into a peripheral or edge region of circuit metallization pattern of the i