EP-4128532-B1 - COMMON MODE VOLTAGE CONTROLLER FOR SELF-BOOSTING PUSH PULL AMPLIFIER

EP4128532B1EP 4128532 B1EP4128532 B1EP 4128532B1EP-4128532-B1

Inventors

TERWAL, REMCO
POWELL, Thomas Omar

Dates

Publication Date: 20260513
Application Date: 20210304

Claims (12)

An amplifier system, comprising: a common mode voltage controller (100) configured to receive an input signal and output a pair of adjusted signals; a modulator (106) that generates a pair of pulse width modulation ,PWM, signals in response to the adjusted signals; and a self-boosting push pull amplifier (108) configured to receive the PWM signals and generate an amplified output, wherein the self-boosting push pull amplifier (108) is configured to generate a differential mode voltage representative of an amplified version of the input signal, wherein the adjusted signals generated by the common mode voltage controller include a dynamically adjusted gain and duty cycle offset that are configured to reduce a common mode voltage of the self-boosting push pull amplifier, wherein the common mode voltage controller comprises: a system that evaluates the input signal and determines a detected level; a standard duty cycle calculator that determines a maximum duty cycle, needed and allowed to achieve a maximum required differential output voltage without consideration of common mode shifting the amplifier output phases (Dmax), associated with the input signal in response to the detected level, a defined supply voltage and a defined maximum output; and an adjusted duty cycle calculator that determines a maximum adjusted duty cycle (D'max) and a duty cycle offset (D'cm) that needs to be subtracted from the duty cycle to calculate a gain correction on the input signal to be applied with the common mode offset, in response to the detected level, the defined supply voltage, the defined maximum output, and a defined minimum phase voltage value, wherein the common mode voltage controller further comprises a gain adjust system for dynamically adjusting the gain of the input signal in response to the maximum duty cycle and maximum adjusted duty cycle to ensure that the differential mode voltage remains representative of the input signal, wherein the duty cycle offset is applied to a gain adjusted signal outputted from the gain adjust system to generate the pair of adjusted audio signals.
The amplifier system of claim 1, wherein the input signal comprises an analog signal or a pulse code modulation (PCM) signal.
The amplifier system of claim 1, wherein the gain adjusted signal is computed according the formula: gain adjusted signal = adjusted maximum duty cycle − 0.5 / maximum duty cycle − 0.5 .
The amplifier system of claim 1, wherein the self-boosting push pull amplifier comprises two fourth order Zeta converter halves creating an eighth order differential amplifier.
The amplifier system of claim 1, wherein the adjusted audio signals generated by the common mode voltage controller further comprise a dynamically adjusted duty cycle.
A method of processing a signal to control common mode voltage for a self-boosting push pull amplifier, wherein the method comprises: receiving an input signal; calculating a maximum duty cycle needed and allowed to achieve a maximum required differential output voltage without consideration of common mode shifting the amplifier output phases (Dmax) based upon the input signal; calculating a maximum adjusted duty (D'max) and a duty cycle offset (D'cm) that needs to be subtracted from the duty cycle to calculate a gain correction on the input signal to be applied with the common mode offset; dynamically adjusting the gain of the input signal to generate a gain adjusted signal in response to the maximum duty cycle and the maximum adjusted duty cycle; and applying the duty cycle offset to the gain adjusted signal to generate a pair of adjusted signals, wherein the adjusted signals are configured to reduce a common mode voltage of a self-boosting push pull amplifier while maintaining a substantially unchanged differential mode voltage.
The method of claim 6, further comprising processing the input signal to determine a detected level.
The method of claim 7, further comprising processing the detected level, a defined supply voltage and a defined maximum output to calculate the maximum duty cycle.
The method of claim 7, further comprising processing the detected level, a defined supply voltage, a defined maximum output and a defined minimum phase voltage value to calculate the maximum adjusted duty cycle and duty cycle offset.
The method of claim 7, wherein the detected level is detected with an envelope detector or a circuit that implements a polynomial transfer function.
The method of claim 6, further comprising generating a pair of pulse width modulation, PWM, signals in response to the adjusted signals using a modulator.
The method of claim 11, further comprising inputting the PWM signals into a power conversion stage of the self-boosting push pull amplifier.

Description

TECHNICAL FIELD This disclosure generally relates to self-boosting amplifier power dissipation reduction techniques, and more particularly to a common mode voltage controller for a fourth order self-boosting push pull amplifier. BACKGROUND A switching audio amplifier can be used to drive speakers for sound reproduction. For example, class-D amplifiers are amplifiers in which amplifying components (e.g., transistors) operate as electronic switches that rapidly switch back and forward between various power supply rails to encode an audio signal into a pulse train. Once processed to remove the high frequency components, the audio signal can be outputted to a loudspeaker for audio acoustical reproduction. Various types of class-D amplifier exist, all typically derived from a fundamental switching converter topology of various orders. The order designates the number of passive components with energy storing capability inside the fundamental converter circuit. Examples of second order topologies are the buck, boost and buck-boost converters. Examples of fourth order topologies include the Ćuk, SEPIC and Zeta converters. A class-D amplifier is created by using such a converter and adjusting it by manipulating the duty cycle of a voltage pulse train. Class-D amplifiers provide a high conversion efficiency given that the transistors never conduct current at the same time they have voltage across them. The only losses that occur are a result of non-ideal transistor switching behavior and component non-idealities in the form of parasitic resistances. US 2020/021256 A1 (TERWAL REMCO [US] ET AL) 16 January 2020 (2020-01-16) and US 2014/369529 A1 (QUINN PATRICK ALLEN [US]) 18 December 2014 (2014-12-18) are examples of such power converters/amplifiers. SUMMARY According to the independent claim 1, systems involving self-boosting push pull amplifiers are provided, and certain implementations include a common mode voltage controller configured to receive an input signal such as an audio signal and output a pair of adjusted signals; a modulator that generates a pair of pulse width modulation (PWM) signals in response to the adjusted signals; a self-boosting push pull amplifier configured to receive the PWM signals and generate an amplified output, wherein the self-boosting push pull amplifier is configured to generate a differential mode voltage representative of an amplified version of the input signal; and wherein the adjusted signals generated by the common mode voltage controller include a dynamically adjusted gain and duty cycle offset that causes the self-boosting push pull amplifier to operate with a reduced common mode voltage. According to the independent method claim 6, a method to control common mode voltage for a self-boosting push pull amplifier is provided. The common mode voltage controller processes signals according to a method that includes: receiving an input signal, such as an audio signal; calculating a maximum duty cycle of the input signal; calculating a maximum adjusted duty cycle and a duty cycle offset of the input signal; dynamically adjusting the gain of the input signal to generate a gain adjusted signal in response to the maximum duty cycle and the maximum adjusted duty cycle; and applying the duty cycle offset to the gain adjusted signal to generate a pair of adjusted signals, wherein the adjusted signals are configured to reduce a common mode voltage of a self-boosting push pull amplifier while maintaining a substantially unchanged differential mode voltage. In some implementations, the input signal includes a pulse code modulation (PCM) signal, and the adjusted signals comprise modified PCM signals. In further implementations, the input signal includes an analog signal. According to claim 1, , the common mode voltage controller includes: a system that evaluates the input signal and determines a detected level; a standard duty cycle calculator that determines a maximum duty cycle associated with the input signal in response to the detected level, a defined supply voltage and a defined maximum output; and an adjusted duty cycle calculator that determines a maximum adjusted duty cycle and a duty cycle offset in response to the detected level, the defined supply voltage, the defined maximum output, and a defined minimum phase voltage value. According to claim 1, the common mode voltage controller includes a gain adjust system for dynamically adjusting the gain of the input signal in response to the maximum duty cycle and maximum adjusted duty cycle to ensure that the differential mode voltage remains representative of the input signal. According to claim 1, , the duty cycle offset is applied to a gain adjusted signal outputted from the gain adjust system to generate the pair of adjusted signals. In some aspects, the gain adjusted signal is computed according the formula: gain adjusted signal = (adjusted maximum duty cycle)-0.5 / (maximum duty cycle)-0.5. In some implementations, the self-boostin