EP-4135174-B1 - VOLTAGE DIVIDING CAPACITOR CIRCUITS AND SUPPLY MODULATORS INCLUDING THE SAME
Inventors
- LEE, JEONGKWANG
- KIM, IKHWAN
- NOMIYAMA, TAKAHIRO
- JUNG, Youngho
Dates
- Publication Date
- 20260506
- Application Date
- 20220519
Claims (7)
- A voltage dividing capacitor circuit (300) for a supply modulator of an integrated circuit device comprising: a first capacitor divider (310) including a first flying capacitor (CF) and a plurality of first switches (311, 312, 313, 314), the first capacitor divider (310) connected to a first voltage node (VN1), a ground node (GN) and a second voltage node (VN2), the first voltage node (VN1) configured to receive a first voltage from a DC-DC converter, the second voltage node (VN2) configured to receive a second voltage from the DC-DC converter between the first voltage node and the ground node, the plurality of first switches (311 - 314) being connected in series between the first voltage node (VN1) and the ground node (GN), the ground node coupled to a ground voltage; a second capacitor divider (320) connected to the first voltage node (VN1), the second voltage node (VN2), and a first intermediate voltage node (IVN1) between the first voltage node (VN1) and the second voltage node (VN2), the second capacitor divider (320) including a second flying capacitor (CF) and a plurality of second switches (321, 322, 323, 324), the plurality of second switches being connected in series between the first voltage node (VN1) and the second voltage node (VN2); a third capacitor divider (330) connected to the second voltage node (VN2), the ground voltage node (GN), and a second intermediate voltage node (IVN2) between the second voltage node (VN2) and the ground node (GN) the third capacitor divider (330) includes a third flying capacitor (CF) and a plurality of third switches (331, 332, 333, 334), the plurality of third switches connected in series between the second voltage node (VN2) and the ground node (GN); and a fourth capacitor divider (320b) connected between the first voltage node (VN1) and the second voltage node (VN2) in parallel with the second capacitor divider (320), wherein the fourth capacitor divider (320b) includes a fourth flying capacitor (CF) and a plurality of fourth switches (341, 342, 343, 344) , the plurality of fourth switches connected in series between the first voltage node (VN1) and the second voltage node (VN2), and wherein the second capacitor divider (320) and the fourth capacitor divider (320b) are configured to operate complementarily with respect to each other; a first load capacitor (CL1) between the first voltage node (VN1) and the first intermediate node (IVN1), a second load capacitor (CL2) between the first intermediate voltage node (IVN1) and the second voltage node (VN2), a third load capacitor (CL3) between the second voltage node (VN2) and the second intermediate voltage node (IVN2), and a fourth load capacitor (CL4) between the second intermediate voltage node (IVN2), and the ground node (GN), such that the first to fourth load capacitors (CI1, CL2, CL3, CL4) are connected in series between the first voltage node (VN1) and the ground node (GN), whereby the voltage dividing capacitor circuit is configured to provide the first voltage (V1), the second voltage (V2), a third voltage (V3) and a fourth voltage (V4) to the first and second voltage nodes (VN1, VN2) and the first and second intermediate voltage nodes (IVN1, IVN2) respectively, wherein the first capacitor divider (310) is configured to, receive the first voltage at the first voltage node (VN1), generate the second voltage corresponding to one half of the first voltage, and output the second voltage to the second voltage node (VN2), , wherein: the second capacitor divider (320) is configured to, generate the third voltage based on the first voltage and the second voltage, and output the third voltage to the first intermediate voltage node (IVN1), the first intermediate voltage node coupled between two of the plurality of second switches (321-324); and the third capacitor divider (330) is configured to, generate the fourth voltage based on the second voltage and the ground voltage, and output the fourth voltage to the second intermediate voltage node (IVN2), the second intermediate voltage node coupled between two of the plurality of third switches (331-334); the third voltage corresponds to one half of a sum of the first voltage and the second voltage; and the fourth voltage corresponds to one half of the second voltage.
- The voltage dividing capacitor circuit of claim 1, wherein each of the first capacitor divider (310), the second capacitor divider (320) and the third capacitor divider (330) is configured to operate individually in response to respective ones of first phase control signals, second phase control signals and third phase control signals.
- The voltage dividing capacitor circuit of claim 1 or 2, wherein the first capacitor divider (310) is configured to: receive a second voltage at the second voltage node (VN2); generate a first voltage corresponding to double a second voltage; and output the first voltage to the first voltage node (VN1).
- A supply modulator comprising: a voltage dividing capacitor circuit (300) as claimed in any one previous claim; and a DC-DC converter (210) configured to generate a current based on a battery voltage, and output the current to at least one of the first voltage node and the second voltage node.
- The supply modulator of claim 4, further comprising: a comparator block (220) including a plurality of comparators (221, 222), the plurality of comparators each configured to, compare one of the plurality of voltages and one of a plurality of reference voltages, and generate a plurality of comparison signals based on results of the comparisons; and a phase control signal generator (235) configured to generate a set of phase control signals based on the plurality of comparison signals, the phase control signal generator configured to provide the phase control signal to the voltage dividing capacitor circuit, and wherein the DC-DC converter (212) includes: a first transistor (SW1) connected between the battery voltage and the second voltage node (VN2) and having a first gate to receive a first switch control signal; a second transistor (SW2) connected between the second voltage node (VN2) and the ground node (GN) and having a second gate to receive a second switch control signal; a comparator (213) configured to compare a second voltage at the second voltage node (VN2) with a second reference voltage of a plurality of reference voltages and generate an internal comparison signal based on the comparison; and a controller (214) configured to generate the first switch control signal and the second switch control signal based on the internal comparison signal.
- The supply modulator of claim 4 or 5, further comprising: a comparator block (220a) including a plurality of comparators (221 -224), the plurality of comparators each configured to, compare one of the plurality of voltages and one of a plurality of reference voltages, and generate a plurality of comparison signals based on results of the comparisons; a power switch control signal generator (230a) configured to generate a first set of power switch control signals based on a first comparison signal of the plurality of comparison signals, and a second comparison signal of the plurality of comparison signals, the first comparison signal associated with the first voltage node (VN1), the second comparison signal associated with the second voltage node (VN2), the power switch control signal generator (230a) configured to provide the first set of power switch control signals to the DC-DC converter (210); and a phase control signal generator (235a) configured to generate a set of phase control signals based on the plurality of comparison signals, the phase control signal generator configured to provide the phase control signal to the voltage dividing capacitor circuit (300a), and wherein the DC-DC converter includes (210): an inductor (211) coupled to the battery voltage; a first power switch (SW1) connected between the inductor and the first voltage node (VN1); a second power switch (SW2) connected between the inductor (211) and the second voltage node (VN2); and a third power switch (SW3) connected between the inductor and the ground node, wherein the DC-DC converter (210) is configured to generate a current based on an energy stored in the inductor, and output the current to at least one of the first voltage node and the second voltage node based on the first set of power switch control signals.
- The supply modulator of claim 4, 5 or 6, wherein the voltage dividing capacitor circuit (300g) includes: a first capacitor divider (310) connected to the first voltage node and the ground node; a second capacitor divider (320) connected to the first voltage node, the second voltage node, and the first intermediate voltage node; a third capacitor divider (330) connected to the second voltage node, the ground node, and to the second intermediate voltage node; a fourth capacitor divider (340) connected to the first voltage node, the first intermediate voltage node, and a third intermediate voltage node; a fifth capacitor divider (350) connected to the first intermediate voltage node, the second voltage node, and a fourth intermediate voltage node; a sixth capacitor divider (360) connected to the second voltage node, the second intermediate voltage node, and the fourth intermediate voltage node; and a seventh capacitor divider (370) connected to the second intermediate voltage node, the ground node, and a fifth intermediate voltage node, and wherein the at least two load capacitors include first through eighth load capacitors (CL1 - CL8) which are connected in series between the first voltage node and the ground node.
Description
1. Technical Field Example embodiments generally relate to voltage converters in integrated circuits, and more particularly to voltage dividing capacitor circuits and supply modulators including the same. 2. Discussion of the Related Art Wireless communication devices, such as smartphones, tablets, and Internet of Things (IoT) devices, etc., use WCDMA (3G), LTE, LTE Advanced (4G), 5G New Radio (NR), etc., technology for high speed communication. As communication technology has advanced, transmission and/or reception signals having a higher peak-to-average power ratio (PAPR) and a greater bandwidth have become desired and/or required. If a power supply of a power amplifier of a transmission end is connected to a battery, the efficiency of the power amplifier decreases. Average power tracking (APT) and/or envelope tracking (ET) is used in order to increase the efficiency of a power amplifier having a high PAPR and a large bandwidth. A chip that supports the APT technique and/or ET technique is referred to as a supply modulator. WO-A-2020/205046 discloses systems, methods, and circuitries for generating supply voltages for a power amplifier in a digital envelope tracking system. A voltage generation circuitry converts a source voltage into a supply voltage based on a target voltage. The voltage regulation circuitry includes an adjustable boost circuitry that multiplies the source voltage to generate an input voltage having a voltage equal to or greater than the source voltage and a step-down regulator circuitry that regulates the input voltage to generate a regulated output voltage having a voltage that is less than or equal to the input voltage. A voltage splitter circuitry is coupled to the regulated output voltage and is configured to generate at least one derived output voltage from the regulated output voltage. SUMMARY Some example embodiments may provide a voltage dividing capacitor circuit capable of enhancing efficiency. Some example embodiments may provide a supply modulator capable of performing discrete ET and enhancing efficiency. The invention provides a voltage dividing capacitor circuit according to claim 1 and a supply modulator according to claim 4. BRIEF DESCRIPTION OF THE DRAWINGS Illustrative, non-limiting example embodiments will be more clearly understood from the following detailed description in conjunction with the accompanying drawings. FIG. 1 is a block diagram illustrating a wireless communication device.FIG. 2A illustrates an example of the digital transmission signal processing circuit (DTSPC) in FIG. 1.FIG. 2B is a graph of an example operation of a supply modulator in FIG. 1.FIG. 3A is a block diagram illustrating an example of a supply modulator.FIG. 3B illustrates an example of an ET reference signal and an average power signal provided to the main controller in FIG. 3A.FIG. 4 is a block diagram illustrating an example of the SIMO converter in the supply modulator in FIG. 3A.FIG. 5A is a block diagram illustrating an example of the SIMO converter of FIG..FIG. 5B is a block diagram illustrating another example of the SIMO converter of FIG. 4.FIG. 6A illustrates a configuration of the first capacitor divider in the voltage dividing capacitor circuit in FIG. 5A.FIGS. 6B and 6C illustrate operation of the first capacitor divider in FIG. 6A, respectively.FIG. 7A is a circuit diagram illustrating an example of the voltage dividing capacitor circuit in the SIMO converter of FIG. 5A.FIG. 7B is a timing diagram illustrating operation of the SIMO converter of FIG. 7A.FIG. 7C illustrates example operating frequencies of the first through third capacitor dividers based on currents provided to loads from the voltages nodes in the SIMO converter in FIG. 7A.FIG. 8A is a circuit diagram illustrating an example of the voltage dividing capacitor circuit in the SIMO converter of FIG. 5A according to some example embodiments.FIGS. 8B and 8C illustrate operations of the second capacitor divider and the fourth capacitor divider in the voltage dividing circuit in FIG. 8A, respectively, according to some example embodiments.FIG. 9 is a circuit diagram illustrating an example of a voltage dividing capacitor circuit not in accordance with the invention.FIG. 10 is a circuit diagram illustrating an example of a voltage dividing capacitor circuit not in accordance with the invention.FIG. 11 is a circuit diagram illustrating an example of a voltage dividing capacitor circuit not in accordance with the invention.FIG. 12 is a circuit diagram illustrating an example of a voltage dividing capacitor circuit according to some example embodiments.FIG. 13 illustrates an example of the voltage dividing capacitor circuit in FIG. 7A performing a soft-start operation.FIG. 14 is a block diagram illustrating an example of the SIMO converter of FIG. 4.FIG. 15 is a block diagram illustrating an example of the SIMO converter of FIG. 4 according to some example embodiments.FIG. 16 is a circuit diagram illustrating an exampl