EP-4220618-B1 - PIXEL CIRCUIT, DISPLAY SUBSTRATE AND DISPLAY DEVICE
Inventors
- XUAN, MINGHUA
Dates
- Publication Date
- 20260506
- Application Date
- 20180131
Claims (5)
- A display substrate comprising: a plurality of scan lines for transmitting scan signals; a plurality of light emission control lines for transmitting light emission control signals; a plurality of data lines for transmitting data voltages; a plurality of pixels arranged in an array; and a substrate on which the plurality of pixels are formed, wherein each pixel of the plurality of pixels is connected to two of the plurality of scan lines, one of the plurality of light emission control lines and one of the plurality of data lines, wherein each of the plurality of pixels comprises: a light emitting device; and a driving circuit for controlling a magnitude of a driving current supplied from a first power supply to the light emitting device in response to a potential at a first node, wherein each of the plurality of pixels further comprises: a storage capacitor for causing a change in the potential at the first node in response to a change in a potential at a second node, wherein the potential at the second node is switchable between a first reference voltage from a first reference power supply and a data voltage from a corresponding one of the plurality of data lines; and a compensation capacitor for suppressing a change in the driving current caused by a change in the first reference voltage, wherein the driving circuit comprises a driving transistor connected in series with the light emitting device and having a source region, a drain region and an active region formed on the substrate, and a gate region spaced apart from the active region in a vertical direction, the source region and the drain region being spaced apart by the active region, wherein the light emitting device is connected between the first power supply and a second power supply, wherein the gate region of the driving transistor is connected to the first node, the source region of the driving transistor is connected to the first power supply, the drain region of the driving transistor is connected to a third node, the storage capacitor is connected between the second node and the first node, and the compensation capacitor is connected between the third node and the second node, wherein the driving transistor is a P-type transistor connected between the first power supply and the third node, and the light emitting device is connected between the third node and the second power supply, wherein each of the plurality of pixels further comprises: a reset circuit configured to supply the first reference voltage from the first reference power supply to the second node and supply a second reference voltage from a second reference power supply to the first node in response to a signal on a first scan line being active; a write circuit configured to supply the data voltage from the data line to the second node and bring the first node into conduction with the third node in response to a signal on a second scan line being active; and a light emission control circuit configured to, in response to a signal on a light emission control line being active, supply the first reference voltage from the first reference power supply to the second node and provide a path allowing the driving current to flow from the first power supply to the second power supply via the light emitting device and the driving transistor, wherein the reset circuit comprises: a first transistor having a gate connected to the first scan line, a first electrode connected to the first reference power supply, and a second electrode connected to the second node; and a second transistor having a gate connected to the first scan line, a first electrode connected to the second reference power supply, and a second electrode connected to the first node, wherein the write circuit comprises: a third transistor having a gate connected to the second scan line, a first electrode connected to the data line, and a second electrode connected to the second node; and a fourth transistor having a gate connected to the second scan line, a first electrode connected to the first node, and a second electrode connected to the third node, wherein the light emission control circuit comprises: a fifth transistor having a gate connected to the light emission control line, a first electrode connected to the first reference power supply, and a second electrode connected to the second node; and a sixth transistor having a gate connected to the light emission control line, a first electrode connected to the light emitting device, and a second electrode connected to the third node, wherein the storage capacitor has a first electrode and a second electrode disposed opposite to each other in the vertical direction, wherein the compensation capacitor has a first electrode and a second electrode disposed opposite to each other in the vertical direction, the first electrode of the compensation capacitor is disposed in a same layer as the first electrode of the storage capacitor and connected to the first electrode of the storage capacitor, and wherein the second electrode of the compensation capacitor is disposed in a same layer as the drain region of the driving transistor, the second electrode of the storage capacitor is disposed in a same layer as the gate region of the driving transistor, and the second electrode of the compensation capacitor is formed by a connection wire to the drain region of the driving transistor.
- The display substrate according to claim 1, wherein the connection wire is made of a doped semiconductor material and disposed in a same layer as the active region of the driving transistor.
- The display substrate according to claim 1, wherein the connection wire couples the drain region to the sixth transistor.
- The display substrate according to any of the preceding claims, wherein the light emitting device is selected from a group comprising an organic light emitting diode and a micro inorganic light emitting diode.
- A display device comprising: the display substrate according to claim 1; a first scan driver for supplying the scan signals to the plurality of scan lines; a second scan driver for supplying the light emission control signals to the plurality of light emission control lines; and a data driver for supplying the data voltages to the plurality of data lines.
Description
FIELD The present disclosure relates to the field of display technologies, and specifically to a pixel circuit, a display substrate and a display device. BACKGROUND In a display panel such as an organic light emitting diode display panel, parasitic capacitance (coupling capacitance) often exists between different wires due to limitation of layout design, and signal crosstalk thus occurs. When the level of a signal in a wire jumps, the level of a signal in another wire may also change, thereby affecting the display effect. FIG. 1 schematically shows how crosstalk is generated in a display panel. In the display panel, a reference voltage Vref is supplied to all the pixels, which can determine a pixel current for a respective pixel together with a respective data voltage Vdata. As shown in FIG. 1, at the time of scanning from an area A to a pixel located in an area B, and scanning from a pixel located in the area B to an area C, a data voltage Vdata of the pixel will jump, causing a jump in the reference voltage Vref which should be stable. At that time, other pixels in a light emitting phase may suffer from undesired display effect such as flicker, i.e. being affected by crosstalk. Document US2014320544 A1 provides an organic light emitting diode (OLED) display, which includes: a substrate, a scan line formed on the substrate and transmitting a scan signal, a data line configured to intersect the scan line and to transmit a data signal, a switching transistor connected to the scan line and the data line, a driving transistor connected to a switching drain electrode of the switching transistor, a compensation transistor connected to the driving transistor, an aging transistor connected to a driving drain electrode of the driving transistor and a source electrode of the compensation transistor, and an organic light emitting diode (OLED) connected to a driving drain electrode of the driving transistor. The compensation transistor is configured to compensate a threshold voltage of the driving transistor. The aging transistor is configured to perform an aging process for reducing a leakage current of the compensation transistor. Document US2016 322450 A1 discloses an organic light-emitting diode display, which includes a substrate, a scan line formed over the substrate and configured to provide a scan signal, and a data line crossing the scan line and configured to provide a data voltage. A driving voltage line crosses the scan line and is configured to provide a driving voltage. The display also includes a switching transistor electrically connected to the scan line and the data line and a driving transistor electrically connected to the switching transistor and including a driving gate electrode, a driving source electrode, and a driving drain electrode. The display further includes a storage capacitor including a first storage electrode formed over the driving transistor and the driving gate electrode as a second storage electrode. The second storage electrode overlaps the first storage electrode in the depth dimension and extends from the driving voltage line. Document US2012 026146 A1 proposes a pixel to compensate for the deterioration of an organic light emitting diode, the pixel includes an organic light emitting diode; a pixel circuit including a driving transistor controlling an amount of current supplied to the organic light emitting diode; and a compensator compensating for the deterioration of the organic light emitting diode by using on-voltage applied when current flows in the organic light emitting diode and off-voltage applied when current does not flow in the organic light emitting diode. The compensator includes: a compensating capacitor having a second terminal connected to a gate electrode of the driving transistor; and a first compensating transistor connected between a first terminal of the compensating capacitor and an anode electrode of the organic light emitting diode. Document US2015 348464 A1 discloses a pixel circuit and an electroluminescent display including the same. The pixel circuit includes a scan transistor connected between a data line and a first node and having a gate electrode configured to receive a scan signal, a driving transistor connected between a first power supply voltage and a third node and having a gate electrode connected to a second node, an emission control transistor connected between the third node and a fourth node and having a gate electrode configured to receive an emission control signal, a light-emitting diode connected between the fourth node and a second power supply voltage less than the first power supply voltage, and a compensation circuit initializes the second node to an initial voltage during a first compensation period and electrically connects the second node to the third node during a second compensation period following the first compensation period. US2016267843 A1 discloses an array substrate comprising a pixel driving circuit. The pixel ci