EP-4235285-B1 - DISPLAY PANEL, ELECTRONIC APPARATUS INCLUDING THE SAME, AND METHOD OF MANUFACTURING THE ELECTRONIC APPARATUS

EP4235285B1EP 4235285 B1EP4235285 B1EP 4235285B1EP-4235285-B1

Inventors

AN, Jun-yong
IN, YUN-KYEONG
CHOI, JUNWON
HWANG, WONMI

Dates

Publication Date: 20260506
Application Date: 20190606

Claims (13)

An electronic apparatus (DD, DD1, DD2, DD3, DD4, DD-1, DD-2, DD-T) comprising: a display panel (DP, DP-1, DP-C, DP-C1) comprising: a base substrate (BS) comprising an active area (AA) and a peripheral area (PA) adjacent to the active area (AA); pixels (PX) on the active area (AA); pads (PD) on the peripheral area (PA) and arranged in a first direction (D1); signal lines (SL, SL-T) connecting the pixels (PX) to the pads (PD); and vernier marks (VM, VM-1, VM-2, VM-3, VM1, VM2, VM-T, VM-T1) on the peripheral area (PA) and spaced apart from the pad (PD) and the signal lines (SL, SL-T), a circuit board (DC) on the display panel (DP, DP-1, DP-C, DP-C1) and comprising: a base film (BF); and leads (LD) on the base film (BF) and overlapping with the corresponding pads (PD) in a plan view; and a conductive adhesive member (AF) extending in the first direction (D1) and between the display panel (DP, DP-1, DP-C, DP-C1) and the circuit board (DC) to connect the pads (PD) to the leads (LD), and wherein each of the vernier marks (VM) comprises a plurality of line patterns (LP) spaced apart from each other in a second direction (D2) crossing the first direction (D1), a portion of the conductive adhesive member (AF) overlaps at least one of the plurality of line patterns (LP), wherein in the second direction (D2), a width (WD) from a lowermost line pattern to an uppermost line pattern among the plurality of line patterns is 100 µm or more and 450 µm or less.
The electronic apparatus of claim 1, wherein an upper end of the conductive adhesive member is aligned with any one of the plurality of line patterns overlapping the conductive adhesive member in the first direction.
The electronic apparatus of claim 1, wherein each of the plurality of line patterns has a line shape extending in the first direction and is spaced apart from each other in the second direction.
The electronic apparatus of claim 3, wherein in the second direction, each of the plurality of line patterns has a width of 3 µm, and in the first direction, a separation distance between the adjacent plurality of line patterns is 50 µm.
The electronic apparatus of claim 1, wherein a distance between the line patterns adjacent to each other is 50 µm.
The electronic apparatus of claim 1, wherein each of the vernier marks further comprises horizontal line patterns extending in the first direction and having a smaller width than the plurality of line patterns in the first direction and disposed between the adjacent plurality of line patterns, and vertical line patterns extending in the second direction and disposed between the adjacent one of the line pattern and the horizontal line pattern.
The electronic apparatus of claim 1, wherein the pixel comprises: a thin film transistor comprising a control electrode, a semiconductor pattern, an input electrode, and an output electrode; and a light emitting element connected to the thin film transistor and comprising a first electrode, a second electrode, and an emission layer between the first electrode and the second electrode, and wherein the vernier mark is disposed on the same layer as any one of the control electrode, the semiconductor pattern, the input electrode, the output electrode, and the first electrode.
The electronic apparatus of claim 7, wherein the vernier mark has the same material as any one of the control electrode, the semiconductor pattern, the input electrode, the output electrode, and the first electrode.
The electronic apparatus of claim 1, wherein the display panel further comprises: a panel alignment mark spaced apart from the pads and overlapping with the conductive adhesive member in a plan view, wherein the circuit board further comprises: a board alignment mark overlapping with the conductive adhesive member in a plan view and corresponding to the panel alignment mark, and when viewed in the second direction, a left end of the vernier mark is aligned with a right end of the panel alignment mark.
The electronic apparatus of claim 1, wherein a distance from top ends of the pads to a top end of the conductive adhesive member in the second direction is less than 100 µm.
The electronic apparatus of claim 1, wherein each of the pads is inclined in a diagonal direction with respect to the first direction and the second direction, a first pad group disposed on the right side and a second pad group disposed on the left side with respect to the center of the pads have symmetrical shapes.
The electronic apparatus of claim 1, wherein the circuit board overlaps a portion of of the vernier mark when viewed in a plan view.
The electronic apparatus of claim 1, wherein each of the plurality of line patterns extends in the first direction and spaced apart from each other in the second direction, each of the vernier marks further comprises vertical patterns extending in the second direction and spaced apart from each other in the first direction, the plurality of line patterns and the vertical patterns have a mesh shape when viewed in a plan view.

Description

BACKGROUND 1. Field Embodiments of the present disclosure herein relate to a display panel, an electronic apparatus including the same, and a method of manufacturing the electronic apparatus, and for example, to a display panel capable of improving process reliability, an electronic apparatus including the same, and a method of manufacturing the electronic apparatus. 2. Description of the Related Art An electronic apparatus may include two or more electronic components. For example, an electronic apparatus such as a portable phone, a notebook computer, or a television may include a display panel configured to display an image, and a circuit board. Two electronic components may be electrically connected to each other through connection of pads. The two electronic components may be physically and electrically coupled to each other through a conductive adhesive member. After aligning the conductive adhesive member with the pads, the two electronic components may be coupled to each other by a thermal compression tool. A process error such as misalignment may occur at the two electronic components by vibration of the two electronic components and/or manufacturing apparatuses. Thus, connection reliability of the electronic components may be deteriorated. Examples may be found in US 6 198 519 B1, US 2003/053056 A1 or US 2007/052344 A1. SUMMARY The present invention is directed to subject matter as defined in the claims. The present disclosure may provide a display panel capable of improving reliability in a manufacturing process, an electronic apparatus including the same, and a method of manufacturing the electronic apparatus. The invention is set out in the appended set of claims. The description that follows is subjected to this limitation. Any disclosure lying outside the scope of said claims is only intended for illustrative as well as comparative purposes. In an embodiment of the present disclosure, an electronic apparatus includes a display panel including a base substrate including an active area and a peripheral area adjacent to the active area, a plurality of pixels on the active area, a plurality of pads on the peripheral area and arranged in a first direction, a plurality of signal lines connecting the pixels to the pads, and vernier marks on the peripheral area and spaced apart from the pads and the signal lines, a circuit board on the display panel and including a base film and leads on the base film and overlapping with the pads in a plan view, and a conductive adhesive member extending in the first direction and between the display panel and the circuit board to connect the pads to the leads. Each of the vernier marks comprises a plurality of line patterns spaced apart from each other in a second direction crossing the first direction, a portion of the conductive adhesive member overlaps at least one of the plurality of line patterns, and in the second direction, a width from a lowermost line pattern to an uppermost line pattern among the plurality of line patterns is 100 µm or more and 450 µm or less. In an embodiment, a bottom end of the vernier mark may be aligned with top ends of the pads in the first direction when viewed in a plan view. In an embodiment, a top end of the conductive adhesive member may be aligned with the bottom end of the vernier mark in the first direction when viewed in a plan view. In an embodiment, the conductive adhesive member may overlap with a portion of the vernier mark when viewed in a plan view. In an embodiment, the circuit board may overlap with a portion of the vernier mark when viewed in a plan view. In an embodiment, the vernier mark may include a conductive material or a semiconductor material. In an embodiment, the pixel may include a thin film transistor including a control electrode, a semiconductor pattern, an input electrode, and an output electrode, and a light emitting element connected to the thin film transistor and including a first electrode, a second electrode, and an emission layer between the first electrode and the second electrode. The vernier mark may be on the same layer as at least one selected from the control electrode, the semiconductor pattern, the input electrode, the output electrode, and the first electrode. In an embodiment, the vernier mark may include a first pattern, and a second pattern on the first pattern, an insulating layer being interposed therebetween to intersect the first pattern. The second pattern may penetrate the insulating layer so as to be connected to the first pattern. In an embodiment, the vernier mark may be on a single layer to have a single unitary body shape. The vernier mark includes a plurality of line patterns arranged in the second direction and extending in the first direction. At least one or some of the line patterns may be exposed from the conductive adhesive member. In an embodiment, the vernier mark may further include a vertical pattern extending in the second direction and intersecting the line p