Search

EP-4297550-B1 - DISPLAY SUBSTRATE AND DISPLAY APPARATUS

EP4297550B1EP 4297550 B1EP4297550 B1EP 4297550B1EP-4297550-B1

Inventors

  • WANG, RONG
  • SHU, Xiaoqing
  • DU, Mengmeng
  • ZHANG, BO
  • DONG, Xiangdan

Dates

Publication Date
20260506
Application Date
20210708

Claims (14)

  1. A display substrate comprising: multiple sub-pixels arranged in an array, wherein the multiple sub-pixels comprise a first sub-pixel emitting light of a first color, a second sub-pixel emitting light of a second color, and a third sub-pixel and a fourth sub-pixel emitting light of a third color; at least one sub-pixel comprises a drive circuit layer (102) disposed on a base substrate (101) and a light emitting structure layer (103) disposed on one side of the drive circuit layer (102) away from the base substrate (101), the drive circuit layer (102) comprises a pixel drive circuit, the pixel drive circuit comprises a drive transistor (210) and a storage capacitor (211), and the light emitting structure layer (103) comprises a light emitting device connected with the pixel drive circuit; there is a first overlapping region between an orthographic projection of an anode of a light emitting device in the third sub-pixel on the base substrate (101) and an orthographic projection of a gate electrode of a drive transistor in the third sub-pixel on the base substrate (101); there is no overlapping region between an orthographic projection of an anode of a light emitting device in the fourth sub-pixel on the base substrate (101) and an orthographic projection of a gate electrode of a drive transistor in the fourth sub-pixel on the base substrate (101); or, there is a second overlapping region between an orthographic projection of an anode of a light emitting device in the fourth sub-pixel on the base substrate (101) and an orthographic projection of a gate electrode of a drive transistor in the fourth sub-pixel on the base substrate (101), wherein an area of the second overlapping region is smaller than an area of the first overlapping region; characterized in that there is a third overlapping region between an orthographic projection of an anode of a light emiting device of in second sub-pixel adjacent to the fourth sub-pixel on the base substrate (101) and the orthographic projection of the gate electrode of the drive transistor in the fourth sub-pixel on the base substrate (101).
  2. The display substrate according to claim 1, wherein the second sub-pixel adjacent to the fourth sub-pixel serves as a compensation sub-pixel
  3. The display substrate according to claim 1 or 2, wherein the light emitting structure layer (103) further comprises a pixel definition layer (302), the pixel definition layer (302) is provided with a pixel opening exposing an anode of the light emitting device; one conductive layer in the drive circuit layer (102) away from the base substrate (101) comprises a data signal line; an orthographic projection of at least one of pixel openings on the base substrate (101) avoids an orthographic projection of a wiring of a conductive layer provided with the data signal line on the base substrate (101), or an orthographic projection of at least one of pixel openings on the base substrate (101) is bisected by an orthographic projection of a wiring of a conductive layer provided with the data signal line on the base substrate (101).
  4. The display substrate according to claim 3, wherein the drive circuit layer (102) comprises a semiconductor layer, a first conductive layer, a second conductive layer, a third conductive layer, and a fourth conductive layer that are sequentially stacked on the base substrate (101); the semiconductor layer comprises an active layer of the drive transistor (210), the first conductive layer comprises a first electrode plate of the storage capacitor and a scan signal line, the second conductive layer comprises a second electrode plate of the storage capacitor, the third conductive layer comprises a power line, and the fourth conductive layer comprises a data signal line; the scan signal line extends along a first direction, and both the power line and the data signal line extend along a second direction, wherein the second direction intersects the first direction.
  5. The display substrate according to claim 2, wherein the pixel drive circuit further comprises a writing transistor, wherein a gate electrode of the writing transistor is connected with a scan signal line, a first electrode of the writing transistor is connected with a data signal line, and a second electrode of the writing transistor is connected with a first electrode of the drive transistor (210); an orthographic projection of the anode of the light emitting device in the compensation sub-pixel on the base substrate (101) is also overlapped with an orthographic projection of an active layer of a writing transistor in the adjacent fourth sub-pixel on the base substrate (101); or, wherein an orthographic projection of the anode of the light emitting device in the compensation sub-pixel on the base substrate (101) is also overlapped with an orthographic projection of an active layer of a drive transistor in the compensation sub-pixel on the base substrate (101).
  6. The display substrate according to claim 2, wherein the pixel drive circuit further comprises a compensation transistor, wherein a gate electrode of the compensation transistor is connected with a scan signal line, a first electrode of the compensation transistor is connected with a gate electrode of the drive transistor (210), and a second electrode of the compensation transistor is connected with a second electrode of the drive transistor (210); an orthographic projection of the anode of the light emitting device in the compensation sub-pixel on the base substrate (101) is also overlapped with an orthographic projection of an active layer of a compensation transistor in the adjacent fourth sub-pixel on the base substrate (101).
  7. The display substrate according to claim 6, wherein the orthographic projection of the anode of the light emitting device in the compensation sub-pixel on the base substrate (101) is also overlapped with an orthographic projection of an active layer of a compensation transistor in the compensation sub-pixel on the base substrate (101); or, wherein the anode of the light emitting device in the third sub-pixel comprises a third region, and a seventh protruding part and an eighth protruding part connected with the third region; a shape of the third region is the same as the shape of a pixel opening in the third sub-pixel, and an area of the third region is larger than an area of the pixel opening in the third sub-pixel; the seventh protruding part and the eighth protruding part are located on opposite sides of the third region, the seventh protruding part is connected with a pixel drive circuit of the third sub-pixel through a via, and an orthographic projection of the eighth protruding part on the base substrate (101) is overlapped with an orthographic projection of an active layer of a compensation transistor in the third sub-pixel on the base substrate (101).
  8. The display substrate according to claim 2, wherein the light emitting structure layer (103) further comprises a pixel definition layer (302), and the pixel definition layer (302) is provided with a pixel opening exposing an anode of the light emitting device; an anode of a light emitting device in the compensation sub-pixel comprises a second region, and a third protruding part and a fourth protruding part connected with the second region; a shape of the second region is the same as a shape of the pixel opening in the compensation sub-pixel, and an area of the second region is larger than an area of the pixel opening in the compensation sub-pixel; the third protruding part is connected with a pixel drive circuit of the compensation sub-pixel through a via; there is a fourth overlapping region between an orthographic projection of the fourth protruding part on the base substrate (101) and an orthographic projection of a gate electrode of a drive transistor in the adjacent fourth sub-pixel on the base substrate (101), and the third overlapping region comprises the fourth overlapping region.
  9. The display substrate according to claim 8, wherein the shape of the second region is a hexagon, and a shape of the fourth protruding part is a trapezoid, and two hypotenuse sides of the fourth protruding part are collinear with two sides of the second region respectively.
  10. The display substrate according to claim 9, wherein the anode of the light emitting device in the fourth sub-pixel comprises a fourth region and a ninth protruding part connected with the fourth region; the ninth protruding part is disposed on one side of the fourth region facing the gate electrode of the drive transistor in the fourth sub-pixel, and is connected with a pixel drive circuit of the fourth sub-pixel through a via.
  11. The display substrate according to claim 10, wherein the ninth protruding part comprises a first side away from the fourth region, and a second side connected with the fourth region and adjacent to the first side, and a chamfer is provided at a connection of the first side and the second side; one side of the fourth protruding part away from the second region is disposed toward the chamfer and is parallel to the chamfer.
  12. The display substrate according to claim 8, wherein the pixel drive circuit further comprises a compensation transistor, a gate electrode of the compensation transistor is connected with a scan signal line, a first electrode of the compensation transistor is connected with a gate electrode of the drive transistor (210), and a second electrode of the compensation transistor is connected with a second electrode of the drive transistor (210); the anode of the light emitting device in the compensation sub-pixel further comprises a fifth protruding part and a sixth protruding part connected with the second region, and the fifth protruding part and the sixth protruding part are located on opposite sides of the second region; an orthographic projection of the fifth protruding part on the base substrate (101) is overlapped with an orthographic projection of an active layer of a compensation transistor in the adjacent fourth sub-pixel on the base substrate (101), and an orthographic projection of the sixth protruding part on the base substrate (101) is overlapped with an orthographic projection of an active layer of a compensation transistor in the compensation sub-pixel on the base substrate (101).
  13. The display substrate according to claim 1 or 2, wherein the multiple sub-pixels are arranged in multiple pixel rows and multiple pixel columns, multiple sub-pixels of a same pixel row are arranged along a first direction, and multiple sub-pixels of a same pixel column are arranged along a second direction, and the second direction intersects the first direction; any one of fourth sub-pixels and a third sub-pixel adjacent to the fourth sub-pixel are located in a same pixel column, and any one of the fourth sub-pixels, and a first sub-pixel and a second sub-pixel adjacent to the fourth sub-pixel are located in a same pixel row.
  14. A display apparatus, comprising the display substrate according to any one of claims 1 to 13.

Description

Technical Field Implements of the present disclosure relate to, but are not limited to, the field of display technologies, and particularly to a display substrate and a display apparatus. Background An Organic Light Emitting Diode (OLED) is an active light emitting display device, which has advantages of auto-luminescence, a wide viewing angle, a high contrast ratio, low power consumption, an extremely high response speed, lightness and thinness, bendability, and a low cost, etc. With continuous development of display technologies, a display apparatus using an OLED as a light emitting device and using a Thin Film Transistor (TFT) for signal control becomes a mainstream product in the field of display at present. Related technology is known from US 2021/193766 A1 (Liu TingLiang [CN]), June 24, 2021. Summary The following is a summary of subject matters described herein in detail. This summary is not intended to limit the scope of protection of claims. A display substrate and a display apparatus are provided as defined in the attached independent claim. Further improvements and embodiments are provided in the dependent claims. An implement of the present disclosure provides a display substrate according to claim 1. An implement of the present disclosure further provides a display apparatus including the display substrate described above. After accompanying drawings and detailed description are read and understood, other aspects may be understood. Brief Description of Drawings FIG. 1 is a schematic diagram of a structure of a display apparatus according to some exemplary implements.FIG. 2 is a schematic diagram of a structure of a pixel arrangement of a display substrate according to some exemplary implements.FIG. 3 is a schematic diagram of a sectional structure of a display substrate according to some exemplary implements.FIG. 4 is a schematic diagram of an equivalent circuit of a pixel drive circuit of a display substrate according to some exemplary implements.FIG. 5 is a working timing diagram of the pixel drive circuit in FIG. 4 in some exemplary implements.FIG. 6 is a schematic diagram of a display substrate after a pattern of a semiconductor layer is formed according to some exemplary implements.FIG. 7a is a schematic diagram of a display substrate after a pattern of a first conductive layer is formed according to some exemplary implements.FIG. 7b is a schematic plan view of the first conductive layer in FIG. 7a.FIG. 8a is a schematic diagram of a display substrate after a pattern of a second conductive layer is formed according to some exemplary implements.FIG. 8b is a schematic plan view of the second conductive layer in FIG. 8a.FIG. 9a is a schematic diagram of a display substrate after a pattern of a fourth insulation layer is formed according to some exemplary implements.FIG. 9b is a schematic plan view of multiple vias of the fourth insulation layer in FIG. 9a.FIG. 10a is a schematic diagram of a display substrate after a pattern of a third conductive layer is formed according to some exemplary implements.FIG. 10b is a schematic plan view of the third conductive layer in FIG. 10a.FIG. 11a is a schematic diagram of a display substrate after a pattern of a first planarization layer is formed according to some exemplary implements.FIG. 11b is a schematic plan view of multiple vias of the first planarization layer in FIG. 11a.FIG. 12a is a schematic diagram of a display substrate after a pattern of a fourth conductive layer is formed according to some exemplary implements.FIG. 12b is a schematic plan view of the fourth conductive layer in FIG. 12a.FIG. 13a is a schematic diagram of a display substrate after a pattern of a second planarization layer is formed according to some exemplary implements.FIG. 13b is a schematic plan view of multiple vias of the second planarization layer in FIG. 13a.FIG. 14a is a schematic diagram of a display substrate after a pattern of an anode is formed according to some exemplary implements.FIG. 14b is a schematic plan view of the anode in FIG. 14a.FIG. 15a is a schematic diagram of a display substrate after a pattern of a pixel definition layer is formed according to some exemplary implements.FIG. 15b is a schematic plan view of the pixel definition layer in FIG. 15a. Reference signs are as follows. 11-first active layer;12-second active layer;13-third active layer;14-fourth active layer;15-fifth active layer;16-sixth active layer;17-seventh active layer;21-first scan signal line22-second scan signal line23-light emitting signal line;24-first electrode plate;31-initial signal line;32-second electrode plate;33-shielding electrode;34-opening;35 -electrode plate connection line;41-first power line;42-connection data electrode;43-first connectionelectrode;44-second connection electrode;45-connection third electrode;51-data signal line;53-connection anode electrode;71-anode;72-pixel definition layer;73-pixel opening;101-base substrate;102-drive circuit layer;103-light emitti