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EP-4328665-B1 - ELECTRONIC DEVICE

EP4328665B1EP 4328665 B1EP4328665 B1EP 4328665B1EP-4328665-B1

Inventors

  • TSAI, CHIA-HAO
  • TAI, MING-JOU

Dates

Publication Date
20260513
Application Date
20230519

Claims (8)

  1. An electronic device (10a, 10b, 10c, 10d), comprising: a substrate (100); a gate line (GL) disposed on the substrate and extending along a first direction; two adjacent data lines disposed on the substrate and intersected with the gate line; a semiconductor layer (200), disposed on the substrate (100) and has a channel area (CH); a light blocking layer (300a, 300b, 300c, 300d), disposed between the substrate (100) and the channel area (CH); and a spacer (400), disposed on the semiconductor layer (200), wherein the light blocking layer (300a, 300b, 300c, 300d) overlaps with the spacer (400) and the channel area (CH), characterised in that the light blocking layer has a width along the first direction, a distance between the two adjacent data lines along the first direction is less than the width.
  2. The electronic device (10c) according to claim 1, wherein the substrate (100) has a surface, a direction (DS) is parallel to the surface of the substrate (100), the spacer (400) has a first thickness (T), the spacer (400) comprises a first side wall (400s1) and an upper bottom surface (400T), the first side wall (400s1) and the direction (DS) have a first included angle (θ), the upper bottom surface (400T) has a first edge (400E1), the light blocking layer (300c) has a second edge (300E2) near the first edge (400E1), and the first edge (400E1) and the second edge (300E2) have a first distance (X) along the direction (DS), wherein the first thickness (T), the first included angle (θ), and the first distance (X) satisfy a relational expression below: T * cot θ ≤ X ≤ T * cot θ + 15 μm .
  3. The electronic device (10a, 10b, 10c, 10d) according to claim 1, wherein the light blocking layer (300a, 300b, 300c, 300d) comprises metal material, wherein a reflectivity of the light blocking layer (300a, 300b, 300c, 300d) is greater than or equal to 0% and less than 70%.
  4. The electronic device (10d) according to claim 1, wherein the spacer (400) comprises a main spacer (400M) and a sub spacer (400S), the light blocking layer (300d) has a first section (300d1) corresponding to the main spacer (400M) and a second section (300d2) corresponding to the sub spacer (400S), wherein a width (300W1) of the first section (300d1) of the light blocking layer (300d) along a second direction (D2) perpendicular to the first direction (D1) is greater than a width (300W2) of the second section (300d2) of the light blocking layer (300d) along the second direction (D2).
  5. The electronic device (10d) according to claim 1, wherein a thickness of a main spacer (400M) is greater than a thickness of a sub spacer (400S).
  6. The electronic device (10a, 10b, 10c, 10d) according to claim 1, further comprising an opposite substrate (100'), the opposite substrate (100') is disposed corresponding to the substrate (100), and a light blocking pattern (BM) is disposed on the opposite substrate (100') and corresponding to the light blocking layer (300a, 300b, 300c, 300d).
  7. The electronic device (10a, 10b, 10c, 10d) according to claim 1, further comprising a drain (D), a pixel electrode (PE), and an insulating layer (IL2), the drain (D) is disposed on the substrate (100), the pixel electrode (PE) is disposed on the drain (D), the insulating layer (IL2) has a hole (H3) and is disposed between the drain (D) and the pixel electrode (PE), the pixel electrode (PE) is electrically connected to the drain (D) through the hole (H3), and the hole (H3) overlaps with the light blocking layer (300a, 300b, 300c, 300d).
  8. The electronic device (10a, 10b, 10c, 10d) according to claim 7, wherein the substrate (100) has a surface, a direction (DS) is parallel to the surface of the substrate (100), the insulating layer (IL2) has a second thickness (t), the insulating layer (IL2) comprises a second side wall (IL2_s), the second side wall (IL2_s) and the direction (DS) have a second included angle (ω), the hole (H3) has a lower bottom surface (H3_B), the lower bottom surface (H3_B) has a third edge (H3_E), the light blocking layer (300a, 300b, 300c, 300d) has a fourth edge (300E1) near the third edge (H3_E), and the third edge (H3_E) and the fourth edge (300E1) have a second distance (Y) along the direction (DS), wherein the second thickness (t), the second included angle (ω), and the second distance (Y) satisfy a relational expression below: t * cot ω ≤ Y ≤ t * cot ω + 10 μm .

Description

BACKGROUND Technical Field The disclosure involves an electronic device. Description of Related Art With the technological progress of modern electronic products and the increasing demands of consumers, electronic devices on the market usually have to be prepared with high resolution. However, electronic devices with high resolution are easily affected by factors such as process and make their opening rate drops. US 2021/132427 A1 relates to a display device including a first substrate, a first drain, a planarization layer, a first pixel electrode, a second substrate, and a spacer. US 2020/233275 A1 relates to a display device including a first source wiring line having a first wide width portion with a second width greater than the first width. SUMMARY The invention is set out in the appended set of claims. The following disclosure serves a better understanding of the present invention. The disclosure provides an electronic device, including an electronic device that may have an enhanced opening rate. In order to make the aforementioned features and advantages of the disclosure comprehensible, embodiments accompanied with drawings are described in detail below. BRIEF DESCRIPTION OF THE DRAWINGS The accompanying drawings are included to provide a further understanding of the invention, and are incorporated in and constitute a part of this specification. The drawings illustrate embodiments of the invention and, together with the description, serve to explain the principles of the invention. FIG. 1 is a top schematic view of an electronic device according to an example not falling within the terms of the claimed subject-matter of the disclosure.FIG. 2 is a cross-sectional schematic view based on the profile line A-A' of FIG. 1.FIG. 3 is a top schematic view of an electronic device according to an embodiment of the disclosure.FIG. 4 is a top schematic view of an electronic device according to an embodiment of the disclosure.FIG. 5 is a cross-sectional schematic view based on the profile line B-B' of FIG. 4.FIG. 6 is a partial cross-sectional schematic view of an electronic device according to an embodiment of the disclosure.FIG. 7 is a partial cross-sectional schematic view of an electronic device according to an embodiment of the disclosure. DESCRIPTION OF THE EMBODIMENTS This disclosure may be understood by referring to the following detailed description in conjunction with the accompanying drawings. It should be noted that, in order to facilitate understanding and for the concision of the drawings, only a part of the electronic device is shown in the drawings in this disclosure, and the specific elements in the drawings are not drawn according to actual scale. In addition, the number and size of each element in the figure are only exemplary and are not used to limit the scope of the disclosure. In the description of the disclosure and the appended claims, certain terms will be used to refer to specific elements. Persons skilled in the art would understand that electronic device manufacturers may refer to the same elements under different names. This disclosure does not intend to distinguish between elements that have the same functions but different names. In the following description and claims, terms such as "including", "containing" and "having" are openended words, so that they should be interpreted as meaning "including but not limited to...". Therefore, when the terms "including", "containing" and/or "having" are used in the description of the disclosure, they designate the presence of corresponding features, regions, steps, operations and/or components, but do not preclude the presence of one or more other features, regions, steps, operations, operations, and/or components. Directional terms mentioned in the specification, such as "up", "down", "front", "rear", "left", "right", etc., only refer to directions of the drawings. Therefore, the used directional terms are illustrative, not limiting, of the disclosure. In the drawings, various figures illustrate general characteristics of methods, structures and/or materials used in particular embodiments. However, these drawings should not be construed to define or limit the scope or nature encompassed by these embodiments. For example, the relative sizes, thicknesses and positions of various layers, regions, and/or structures may be reduced or exaggerated for clarity's sake. When a corresponding component (for example, a film layer or region) is referred to as being "on" another component, it may be directly on the other component or there may be other components therebetween. On the other hand, when a component is referred to as being "directly on another component," there is no component therebetween. In addition, when a component is referred to as being "on another component ", the two components have a top-down relationship in a top view, and the component may be above or below the other component, and the top-down relationship depends on an orientati