EP-4495793-B1 - CHIP COMMUNICATION CIRCUIT, METHOD, AND APPARATUS BASED ON AUTOMATIC CLOCK SYNCHRONIZATION

EP4495793B1EP 4495793 B1EP4495793 B1EP 4495793B1EP-4495793-B1

Inventors

WANG, HAILONG
YANG, GUANG
LIU, Qiangqiang
CHENG, Xiangchun

Dates

Publication Date: 20260513
Application Date: 20240530

Claims (6)

A chip communication circuit based on automatic clock synchronization, comprising: a controller, configured to send a control instruction; and multiple battery management chips, comprising: a first battery management chip and other battery management chips except for the first battery management chip, wherein the first battery management chip is connected to the controller through a serial peripheral interface, and a daisy chain with a three-level sawtooth waveform is used for isolated communication between different battery management chips; wherein the first battery management chip is configured to: determine clock synchronization information of the first battery management chip in response to the received control instruction; replace a chip selection enable signal in the control instruction with a clock synchronization signal carrying the clock synchronization information of the first battery management chip to obtain a new control instruction; and transmit the new control instruction to other battery management chips, so that the other battery management chips perform automatic clock synchronization based on the clock synchronization information carried in the new control instruction; wherein at initialization of each of the multiple battery management chips, the controller is further configured to configure a scheduler mode parameter of the battery management chip, and send a scheduler mode start instruction to the battery management chip to control the battery management chip to execute a communication task in a cyclic manner according to the scheduler mode parameter, wherein the scheduler mode parameter comprises at least one of: a balancing start time, a settling time after balancing, a preparation time before self-diagnosis of a balancing circuit, a preparation time before open wire self-diagnosis of a battery collection wire, and a time required for collecting battery voltage or temperature.
The chip communication circuit according to claim 1, wherein the other battery management chips is further configured to determine whether the clock synchronization information carried in the new control instruction is the same as clock information of the other battery management chips each time the new control instruction is received; and calibrate the clock information of the other battery management chips based on the clock synchronization information to perform automatic clock synchronization if it is determined that the clock synchronization information is different from the clock information of the other battery management chips.
The chip communication circuit according to claim 1 or 2, wherein the other battery management chips are further configured to determine whether the clock synchronization information carried in at least two new control instructions is the same when receiving the at least two new control instructions; and calibrate clock information of the other battery management chips based on the last received clock synchronization information to perform automatic clock synchronization if it is determined that the clock synchronization information carried in the at least two new control instructions is different.
A chip communication method based on automatic clock synchronization, comprising: determining (S101) clock synchronization information of a first battery management chip in response to a received control instruction, wherein the control instruction is sent by a controller to the first battery management chip among multiple battery management chips through a serial peripheral interface; replacing (S102) a chip selection enable signal in the control instruction with a clock synchronization signal carrying the clock synchronization information of the first battery management chip to obtain a new control instruction; and transmitting (S103) the new control instruction to other battery management chips, so that the other battery management chips perform automatic clock synchronization based on the clock synchronization information carried in the new control instruction; wherein the other battery management chips are battery management chips among the multiple battery management chips except for the first battery management chip, and a daisy chain with a three-level sawtooth waveform is used for isolated communication between different battery management chips; wherein the method further comprises: at initialization of each of the multiple battery management chips, configuring a scheduler mode parameter of the battery management chip, wherein the scheduler mode parameter comprises at least one of: a balancing start time, a settling time after balancing, a preparation time before self-diagnosis of a balancing circuit, a preparation time before open wire self-diagnosis of a battery collection wire, and a time required for collecting battery voltage or temperature; and in response to a scheduler mode start instruction received by the battery management chip, executing a communication task in a cyclic manner according to the scheduler mode parameter.
A computer-readable storage medium storing computer execution instructions, wherein the computer execution instructions are used to implement the method according to claim 4 when executed by a processor.
A computer program product comprising a computer program, wherein the computer program implements the method according to claim 4 when executed by a processor.

Description

TECHNICAL FIELD The present application relates to communication technology and, in particular, to a chip communication circuit, method, and apparatus based on automatic clock synchronization. BACKGROUND Existing daisy chain communication technology solutions are all achieved through converting universal serial communication into isolated serial communication of differential signals. For example, there are mainly two types: one is converting into isolated serial communication of differential signals by a universal asynchronous receiver/transmitter UART, and the other one is converting into isolated serial communication of differential signals by a serial peripheral interface SPI. Since the entire communication process involves a microcontroller MCU sending data to battery management chips AFEs, the communication process is mainly divided into two modes: a read mode and a write mode. However, read and the write cannot occur simultaneously on the daisy chain, and data needs to be written first before being read. However, the existing daisy chain communication methods have high communication power consumption and unsynchronized clocks among battery management chips, and cannot take into account both communication anti-interference and signal recognition. XP93216625 discloses introductions about sawtooth waves. CN115291833B discloses a battery management system and its daisy chain communication method. XP93216638 discloses introductions about pulse-amplitude modulation. XP93216178 discloses introductions about square wave. US20160120448A1 provides systems and methods for analyte monitoring, particularly systems and methods for monitoring and managing life of a battery in an analyte sensor system worn by a user. SUMMARY The invention is set out in the appended set of claims. The present application provides a chip communication circuit, method, and apparatus based on automatic clock synchronization, to solve the problem of high communication power consumption and unsynchronized clocks among battery management chips in existing daisy chain communication methods, and achieve the technical effect of reducing the power consumption of the daisy chain communication, maintaining the clock synchronization of battery management chips, and taking into account both communication anti-interference and signal recognition. The present application provides a chip communication method based on automatic clock synchronization, including: determining clock synchronization information of a first battery management chip in response to a received control instruction, where the control instruction is sent by a controller to the first battery management chip among multiple battery management chips through a serial peripheral interface;replacing a chip selection enable signal in the control instruction with a clock synchronization signal carrying the clock synchronization information of the first battery management chip to obtain a new control instruction; andtransmitting the new control instruction to other battery management chips, so that the other battery management chips perform automatic clock synchronization based on the clock synchronization information carried in the new control instruction; where the other battery management chips are battery management chips among the multiple battery management chips except for the first battery management chip, and a daisy chain with a sinusoidal sawtooth waveform is used for isolated communication between different battery management chips. The method further includes: at initialization of each of the multiple battery management chips, configuring a scheduler mode parameter of the battery management chip, where the scheduler mode parameter includes at least one of: a balancing start time, a settling time after balancing, a preparation time before self-diagnosis of a balancing circuit, a preparation time before open wire self-diagnosis of a battery collection wire, and a time required for collecting battery voltage or temperature;in response to a scheduler mode start instruction received by the battery management chip, executing a communication task in a cyclic manner according to the scheduler mode parameter. The present application provides a chip communication circuit based on automatic clock synchronization, including: a controller, configured to send a control instruction; andmultiple battery management chips, including: a first battery management chip and other battery management chips except for the first battery management chip, where the first battery management chip is connected to the controller through a serial peripheral interface, and a daisy chain with a sinusoidal sawtooth waveform is used for isolated communication between different battery management chips;where the first battery management chip is configured to: determine clock synchronization information of the first battery management chip in response to the received control instruction; replace a chip selection enable