EP-4499765-B1 - COMPOSITIONS AND METHODS FOR TUNGSTEN ETCHING INHIBITION
Inventors
- CHAO, CHING HSUN
- TSAI, TSUNG YU
- CHEN, YONG YU
- LAUTER, MICHAEL
- WEI, TE YU
Dates
- Publication Date
- 20260506
- Application Date
- 20230327
Claims (20)
- A dielectric polishing composition comprising (A) surface - modified colloidal silica particles comprising a negatively - charged group on the surface of the particles, wherein the surface-modified colloidal silica particles have a negative charge, a particle size of from 60 nm to 200 nm, as determined using dynamic light scattering technique, and a zeta potential < -35 mV at a pH in the range of from ≥ 2.0 to ≤ 4.5, the zeta potential is determined using the method disclosed in the description; (B) a first corrosion inhibitor selected from at least one guanidine derivative; (C) a second corrosion inhibitor selected from polyacrylamides or polyacrylamide copolymers; (D) at least one iron (III) oxidizer; (E) at least one silicon oxide removal rate enhancer selected from phosphoric acid and salts thereof; (F) at least one stabilizer; and (G) an aqueous medium, wherein the pH of the composition is in the range of from ≥ 2.0 to ≤ 4.5.
- The composition according to claim 1, wherein the surface-modified colloidal silica particles have a zeta potential of from -80 mV to -35 mV at a pH in the range of from ≥ 2.0 to ≤ 4.5.
- The composition according to any of claims 1 to 2, wherein the concentration of the surface - modified colloidal silica particles (A) is in the range of from ≥ 0.01 wt.% to ≤ 13.0 wt.%, based on the total weight of the composition.
- The composition according to any of claims 1 to 3, wherein the guanidine derivative is selected from buformin, phenformin, guanine, proguanil hydrochloride, 2-guanidinobenzimidazole, polyhexamethylene biguanide hydrochloride, polyaminopropyl biguanide, chlorhexidine or chlorhexidine salts.
- The composition according to any of claims 1 to 4, wherein the concentration of the first corrosion inhibitor (B) is in the range of from ≥ 0.005 wt.% to ≤ 0.05 wt.%, based on the total weight of the composition.
- The composition according to any of claims 1 to 5, wherein the wherein the pH of the composition is in the range of from ≥ 2.5 to ≤ 4.0.
- The composition according to any of claims 1 to 6, wherein the weight average molecular weight of the second corrosion inhibitor (C) is in the range of from ≥ 5000 g/mol to ≤ 50,000 g/mol, determined according to gel permeation chromatography.
- The composition according to any of claims 1 to 7, wherein the concentration of the second corrosion inhibitor (C) is in the range of from ≥ 0.005 wt.% to ≤ 0.02 wt.%, based on the total weight of the composition.
- The composition according to any of claims 1 to 8, wherein the iron (III) oxidizer (D) is selected from iron (III) nitrate or hydrates thereof.
- The composition according to any of claims 1 to 9, wherein the concentration of the iron (III) oxidizer (D) is in the range of from ≥ 0.005 wt.% to ≤ 0.1 wt.%, based on the total weight of the composition.
- The composition according to any of claims 1 to 10, wherein the concentration of the silicon oxide removal rate enhancer (E) is in the range of from ≥ 0. 1 wt.% to ≤ 1.0 wt.%, based on the total weight of the composition.
- The composition according to any of claims 1 to 11, wherein the stabilizer (F) is selected from acetic acid, acetylacetonate, o-phosphorylethanolamine, phosphonic acid, alendronic acid, acetic acid, phthalic acid, citric acid, adipic acid, oxalic acid, malonic acid, aspartic acid, succinic acid, glutaric acid, pimelic acid, suberic acid, azelaic acid, sebacic acid, oxalic acid, maleic acid, gluconic acid, muconic acid, ethylenediaminetetraacetic acid, propylene diaminetetraacetic acid, N,N-bis(carboxymethyl) alanine, nitrilo-triacetic acid, diethylene-triamine-pentaacetic acid, bis(salicyliden)ethylendiamin, aminotris(methylenephosphonic acid), diethylene-triamine-pentakis(methylphosphonic acid), ethylenediamine-tetra(methylene-phosphonic acid), or mixtures thereof.
- The composition according to any of claims 1 to 12, wherein the concentration of the stabilizer (F) is in the range of from ≥ 0.005 wt.% to ≤ 0.15 wt.%, based on the total weight of the composition.
- The composition according to any of claims 1 to 13, wherein composition further comprises an additive selected from pH adjusting agent, oxidizing agent, wetting agent, dispersing agent, biocide, or mixtures thereof.
- The composition according to any of claims 1 to 14, wherein the composition is for polishing a substrate (S) wherein the substrate (S) comprises: (i) tungsten and/or (ii) tungsten alloys; and (iii) at least one dielectric layer selected from silicon, silicon oxide, silicon nitride, or low-k material.
- A process for the manufacture of a semiconductor device comprising the chemical mechanical polishing of a substrate (S) used in the semiconductor industry wherein the substrate (S) comprises (i) tungsten and/or (ii) tungsten alloys; and (iii) at least one dielectric layer selected from silicon, silicon oxide, silicon nitride, or low-k material, in the presence of a composition as defined in any one of claims 1 to 15.
- The process according to claim 16, wherein the ratio of material removal rate (MRR) of silicon oxide to the material removal rate (MRR) of tungsten is in the range from 2:1 to 100:1.
- The process according to any of claims 16 to 17, wherein the static etch rate (SER) of tungsten is < 20 ppb.
- The process according to any claims 16 to 18, wherein the material removal rate (MRR) of silicon oxide is > 100 Å/min.
- The process according to any claims 16 to 19, wherein the material removal rate (MRR) of silicon nitride is > 80 Å/min.
Description
Technical Field The presently claimed invention relates to compositions and methods for polishing dielectric. The presently claimed invention particularly relates to compositions and methods that provide high selectivity towards removal of dielectric versus tungsten. Background Fabrication of Integrated circuits (ICs) is a multi-step process. The first steps (also called front-end-of-line or FEOL steps) involve the patterning of individual devices such as transistors (for example C-MOSFETs) by suitable techniques (such as photo-lithography or ion implant) on the semiconductor. This is followed by insertion of metal wires/plugs and insulating layers (such as dielectric) to interconnect the various devices (also called back-end-of-line or BEOL steps). With the continuous shrink of the feature size in the ultra-large-scale integrated circuits (ULSI) technology, multi-level interconnects need to be formed. Metals such as tungsten, cobalt, ruthenium and copper are commonly employed as connects and the selection of specific metal is done on the basis of its position in the architecture. For instance, a common first metal interconnect (metal layer 0) is a tungsten plug inserted in a dielectric layer (such as silicon dioxide). On the other hand, during BEOL steps copper is the most commonly deposited metal, but for the lower interconnect levels (for e.g., metal layers 1 - 4) tungsten and cobalt are also commonly employed. CMP (Chemical mechanical planarization) has been found to be the key enabling technology for multi-level interconnect formation, as it can initiate both local and global planarization and at the same time provide a good surface quality, in terms of an excellent mirror-like defect-free surface finish. Purely mechanical polishing or (fine) grinding will provide excellent planarization, but dull surfaces. On the other hand, purely chemical polishing (anisotropic etching) will provide only poor planarization results, but excellent mirror-like surface finish. Herein, CMP utilizes the interplay of chemical and mechanical action to achieve the desired planarity and finish of the to-be-polished surfaces. Mechanical action is usually carried out by the interaction of the CMP composition comprising a finely dispersed abrasive and the polishing pad which is typically pressed onto the to-be-polished surface and mounted on a moving platen. In a typical CMP process step, a rotating wafer holder brings the to-be-polished wafer in contact with a polishing pad. The CMP composition is usually applied between the to-be-polished wafer and the polishing pad. Typical CMP compositions or slurries comprise one or more abrasives (insoluble/dispersed) components along with soluble components. The chemical action is provided by said soluble components of the CMP composition. Commonly, for achieving metal CMP, the chemical components are commonly tailored by balancing a corroding component (for example an acid, base or oxidiser) with a suitable inhibitor. However, it is important that the soluble and insoluble components are compatible to ensure colloidal stability. Colloidally unstable solutions or agglomerates can damage the surface and fine structures on the wafer to be polished by scratching. Therefore, in order to achieve suitable planarization and surface quality, a precise selection of components and their concentrations would be necessary for obtaining a suitable CMP composition. In addition, the properties (for example etching) of several or all of the above-mentioned metals might have to be considered, when a slurry is designed, depending on the integration scheme. For instance, when fabricating ICs involving tungsten (metal 0), CMP is employed to remove the metal and liner/barrier overburden until a planar metal 0 (or higher) layer is exposed. U.S. 6,083,419 A, for instance, describes a CMP composition comprising a compound that is capable of etching tungsten, at least one inhibitor of tungsten etching, wherein the inhibitor of tungsten etching is a compound including at least one functional group selected from nitrogen containing heterocycles without nitrogen-hydrogen bonds, sulphides, oxazolidines or mixtures of functional groups in one compound. In cases such as U.S. 6,083,419 A, since the intended end point for such applications is the dielectric (for e.g., silicon oxide layer obtained by CVD deposition with tetraethylorthosilicate or TEOS), state of art slurries are tailored to achieve high tungsten versus silicon oxide removal rate. US 2019/0211227 and US 2019/0211228, for instance, aim at achieving high selectivity of tungsten removal by employing surface-modified colloidal silica particles bearing a negative charge. On the other hand, in order to enable new integration schemes, the selective removal of dielectric is highly desirable. US 8,492,277 provides methods for polishing involving use of a composition comprising acyclic organosulfonic acid to provide selectively high removal rates for silicon oxide a