EP-4568441-B1 - SEMICONDUCTOR DEVICE

Inventors

• KIM, SUHWAN
• KU, Myeong-chan
• SHIN, DONGMIN
• WOO, Kayeon
• KIM, Beom-Jong
• CHUNG, SUKJIN
• JUNG, HYUNGSUK

Dates

Publication Date

20260513

Application Date

20240920

Claims (10)

1. A semiconductor device comprising a capacitor (CAP), wherein the capacitor includes: a bottom electrode (BE); a first sub-dielectric layer (DL1) on the bottom electrode; a second sub-dielectric layer (DL2) on the first sub-dielectric layer; and a top electrode (TE) on the second sub-dielectric layer, wherein the second sub-dielectric layer includes: a first antiferroelectric layer (AF1) on the first sub-dielectric layer; a second antiferroelectric layer (AF2) above the first antiferroelectric layer; and a first ferroelectric layer (FE1) between the first antiferroelectric layer and the second antiferroelectric layer, characterised in that each of the first and second antiferroelectric layers includes zirconium oxide that is doped with a first element, and wherein the first sub-dielectric layer includes zirconium oxide that is not doped with the first element.
2. The semiconductor device of claim 1, wherein the first ferroelectric layer includes hafnium oxide or hafnium-zirconium oxide.
3. The semiconductor device of claim 2, wherein a component ratio of hafnium included in the first ferroelectric layer to zirconium included in the first ferroelectric layer is in a range of about 10:0 to about 5:5.
4. The semiconductor device of any preceding claim, wherein each of the first sub-dielectric layer, the first antiferroelectric layer, the second antiferroelectric layer, and the first ferroelectric layer has a thickness of about 5 Å to about 15 Å.
5. The semiconductor device any preceding claim, wherein the first element doped into the first and second antiferroelectric layers includes at least one element selected from Al, Mg, Be, Y, La, Ca, C, Si, Ge, Sn, Pb, Gd, and Ti.
6. The semiconductor device of any preceding claim, wherein the first ferroelectric layer comprises a material other than the first element.
7. The semiconductor device of any preceding claim, wherein the first sub-dielectric layer is in contact with the bottom electrode, and the second antiferroelectric layer is in contact with the top electrode.
8. The semiconductor device of any preceding claim, further comprising a support pattern (SS) in contact with an upper lateral surface of the bottom electrode, wherein the first sub-dielectric layer covers the support pattern.
9. The semiconductor device of any preceding claim, wherein the first and second antiferroelectric layers includes a tetragonal crystal phase, and the first ferroelectric layer includes an orthorhombic crystal phase.
10. The semiconductor device of any preceding claim, wherein the bottom electrode has a pillar shape or a cylindrical shape.

Description

BACKGROUND Semiconductor devices have an important role in the electronic industry because of their small size, multi-functionality, and/or low fabrication cost. Semiconductor devices may be categorized as any one of semiconductor memory devices storing logic data, semiconductor logic devices processing operations of logic data, and hybrid semiconductor devices having both memory and logic elements. As the semiconductor devices are developed to high integration, capacitors are required to have high capacitance in a limited area. The capacitance of the capacitor is proportional to a surface of an electrode and a dielectric constant of a dielectric layer while being inversely proportional to an equivalent oxide thickness of the dielectric layer. Document US2023290810 A1 discloses a semiconductor device comprising a capacitor, the capacitor comprising ferroelectric and antiferroelectric layers. SUMMARY The present disclosure relates to a semiconductor device, and more particularly, to a semiconductor device including a capacitor. Some implementations provide a semiconductor device with increased capacitance. Some implementations provide a semiconductor device having reduced leakage current. The object of the present disclosure is not limited to the above-mentioned elements, and other objects which have not been mentioned above will be clearly understood to those skilled in the art from the following description. A semiconductor device may comprise a capacitor. The capacitor may include: a bottom electrode; a first sub-dielectric layer on the bottom electrode; a second sub-dielectric layer on the first sub-dielectric layer; and a top electrode on the second sub-dielectric layer. The second sub-dielectric layer may include: a first antiferroelectric layer on the first sub-dielectric layer; a second antiferroelectric layer on the first antiferroelectric layer; and a first ferroelectric layer between the first antiferroelectric layer and the second antiferroelectric layer. Each of the first and second antiferroelectric layers may include zirconium oxide that is doped with a first element. The first sub-dielectric layer may include zirconium oxide that is not doped with the first element. A semiconductor device may comprise: a substrate; a plurality of word lines in the substrate; a first impurity region in the substrate on one side of the word lines; a second impurity region in the substrate between the word lines; a bit line connected to the second impurity region and on the substrate, the bit line perpendicular to the word lines; a conductive contact connected to the first impurity region and on the substrate; a bottom electrode on the conductive contact; a dielectric layer on the bottom electrode; a top electrode on the dielectric layer; and a support pattern in contact with an upper lateral surface of the bottom electrode. The dielectric layer may include a first sub-dielectric layer and a second sub-dielectric layer that are sequentially stacked. The second sub-dielectric layer may include: a plurality of antiferroelectric layers on the first sub-dielectric layer; and a plurality of ferroelectric layers correspondingly between the antiferroelectric layers. Each of the antiferroelectric layers may include zirconium oxide that is doped with a first element. The first sub-dielectric layer may include zirconium oxide that is not doped with the first element. A sum of thicknesses of the ferroelectric layers may be about 0.2 times to about 0.4 times a thickness of the dielectric layer. A semiconductor device may comprise: a substrate; a plurality of conductive contacts on the substrate; and a plurality of capacitors on the conductive contacts. Each of the capacitors may include: a bottom electrode; a dielectric layer on the bottom electrode; and a top electrode on the dielectric layer. The dielectric layer may include a first sub-dielectric layer and a second sub-dielectric layer that are sequentially stacked. The second sub-dielectric layer may include: a first antiferroelectric layer on the first sub-dielectric layer; a second antiferroelectric layer on the first antiferroelectric layer; and a first ferroelectric layer between the first antiferroelectric layer and the second antiferroelectric layer. The first sub-dielectric layer may have a first thickness. The first ferroelectric layer may have a second thickness. Each of the first and second antiferroelectric layers may have a third thickness. Each of the first, second, and third thicknesses may be in a range of about 5 Å to about 15 Å (e.g. of 5 Å to 15 Å). At least some of the above and other features of the invention are set out in the claims. BRIEF DESCRIPTION OF DRAWINGS FIG. 1 illustrates a cross-sectional view showing an example semiconductor device.FIG. 2 illustrates a plan view showing an example semiconductor device.FIG. 3 illustrates a cross-sectional view taken along line A-A' of FIG. 2.FIG. 4A illustrates an enlarged view showing section P1 of FIG.