EP-4735959-A1 - METHOD TO CALIBRATE, PREDICT, AND CONTROL STOCHASTIC DEFECTS IN EUV LITHOGRAPHY

Abstract

Based on an initial probability of occurrence of a stochastic defect over a layout of a workpiece, a subset of locations on the workpiece are selected where the initial probability is above a threshold. The subset of locations are grouped by pattern shapes. An expected defect count is determined for each of the pattern shapes. A subset of the pattern shapes is then selected for repair.

Inventors

• VUKKADALA, Pradeep
• GRAVES, JOHN S
• SMITH, MARK D
• BIAFORE, JOHN J
• ZHANG, Cao
• BUROV, ANATOLY
• PARSEY, GUY
• KO, KYEONGEUN
• BAKARIAN, SERGEI G
• KREK, JANEZ
• BAI, KUNLUN
• HIGGINS, CRAIG

Assignees

• KLA Corporation

Dates

Publication Date

20260506

Application Date

20240925

Claims (19)

1. 1. A method comprising: receiving, at a processor, an initial probability of occurrence of a stochastic defect over a layout of a workpiece, wherein the initial probability of occurrence of a stochastic defect is generated using a model; selecting, using a processor, a subset of locations on the workpiece where the initial probability is above a threshold; grouping, using the processor, the subset of locations by pattern shapes on the workpiece; determining, using the processor, an expected defect count for each of the pattern shapes; selecting, using the processor, a subset of the pattern shapes for repair; repairing, using the processor, at least one of each of the subset of the pattern shapes thereby generating at least one repaired pattern shape; and inserting, using the processor, the repaired pattern shape into corresponding locations of the layout.
2. 2. The method of claim 1 , wherein selecting the subset of pattern shapes for repair includes sorting the pattern shapes by an expected defect count, determining a cumulative expected defect count, and thresholding the pattern shapes to a fraction of detectivity.
3. 3. Tire method of claim 1, wherein selecting the subset of pattern shapes for repair includes sorting the pattern shapes by probability and thresholding the pattern shapes to a probability.
4. 4. The method of claim 1 , wherein selecting the subset of pattern shapes for repair includes determining a fraction expected defect count versus fractional location count curve for each of the layouts.
5. 5. The method of claim 4, wherein the pattern shapes for repair are selected from the fraction expected defect count versus fractional location count curve.
6. 6. The method of claim 1 , wherein selecting the subset of pattern shapes for repair includes determining an expected defect count versus fractional location count curve for each of the layouts.
7. 7. The method of claim 6, wherein the pattern shapes for repair are selected from the expected defect count versus fractional location count curve.
8. 8. A system comprising: an inspection tool configured to image a workpiece; and a processor in electronic communication with the inspection tool, wherein the processor is configured to: receive an initial probability of occurrence of a stochastic defect over a layout of a workpiece, wherein the initial probability of occurrence of a stochastic defect is generated using a model; select a subset of locations on the workpiece where the initial probability is above a threshold; group the subset of locations by pattern shapes on the workpiece; determine an expected defect count for each of the pattern shapes; select a subset of the pattern shapes for repair; repair at least one of each of the subset of the pattern shapes thereby generating at least one repaired pattern shape; and insert the repaired pattern shape into corresponding locations of the layout.
9. 9. The system of claim 8, wherein selecting the subset of pattern shapes for repair includes sorting the pattern shapes by an expected defect count, determining a cumulative expected defect count, and thresholding the pattern shapes to a fraction of detectivity.
10. 10. The system of claim 8, wherein selecting the subset of pattern shapes for repair includes sorting the pattern shapes by probability and thresholding the pattern shapes to a probability.
11. 11. The system of claim 8, wherein selecting the subset of pattern shapes for repair includes determining a fraction expected defect count versus fractional location count curve for each of the layouts.
12. 12. The system of claim 11, wherein the pattern shapes for repair are selected from the fraction expected defect count versus fractional location count curve.
13. 13. The system of claim 8, wherein selecting the subset of pattern shapes for repair includes determining an expected defect count versus fractional location count curve for each of the layouts.
14. 14. The system of claim 13, wherein the pattern shapes for repair are selected from the expected defect count versus fractional location count curve.
15. 15. A non-transitory computer-readable storage medium, comprising one or more programs for executing the following steps on one or more computing devices: receive an initial probability of occurrence of a stochastic defect over a layout of a workpiece, wherein the initial probability of occurrence of a stochastic defect is generated using a model; select a subset of locations on the workpiece where the initial probability is above a threshold; group the subset of locations by pattern shapes on the workpiece; determine an expected defect count for each of the pattern shapes; select a subset of the pattern shapes for repair; repair at least one of each of the subset of the pattern shapes thereby generating at least one repaired pattern shape; and insert the repaired pattern shape into corresponding locations of the layout.
16. 16. The non-transitory computer-readable storage medium of claim 15, wherein selecting the subset of pattern shapes for repair includes sorting the pattern shapes by an expected defect count, determining a cumulative expected defect count, and thresholding the pattern shapes to a fraction of defectivity.
17. 17. The non-transitory computer-readable storage medium of claim 15, wherein selecting the subset of pattern shapes for repair includes sorting the pattern shapes by probability and thresholding the pattern shapes to a probability.
18. 18. The non-transitory computer-readable storage medium of claim 15, wherein selecting the subset of pattern shapes for repair includes determining a fraction expected defect count versus fractional location count curve for each of the layouts, and wherein the pattern shapes for repair are selected from the fraction expected defect count versus fractional location count curve.
19. 9. The non-transitory computer-readable storage medium of claim 15, wherein selecting the subset of pattern shapes for repair includes determining an expected defect count versus fractional location count curve for each of the layouts, and wherein the pattern shapes for repair are selected from the expected defect count versus fractional location count curve.

Description

METHOD TO CALIBRATE, PREDICT, AND CONTROL STOCHASTIC DEFECTS IN EUV LITHOGRAPHY CROSS-REFERENCE TO RELATED APPLICATIONS [0001] This application claims priority to the provisional patent application filed September 26, 2023, and assigned U.S. App. No. 63/540,605, the disclosure of which is hereby incorporated by reference. FIELD OF THE DISCLOSURE [0002] This disclosure relates to metrology of stochastic defects during semiconductor manufacturing. BACKGROUND OF THE DISCLOSURE [0003] Evolution of the semiconductor manufacturing industry is placing greater demands on yield management and, in particular, on metrology and inspection systems. Critical dimensions continue to shrink, yet the industry needs to decrease time for achieving high-yield, high-value production. Minimizing the total time from detecting a yield problem to fixing it maximizes the retum-on-investment for a semiconductor manufacturer. [0004] Fabricating semiconductor devices, such as logic and memory' devices, typically includes processing a semiconductor wafer using a large number of fabrication processes to form various features and multiple levels of the semiconductor devices. For example, lithography is a semiconductor fabrication process that involves transferring a pattern from a reticle to a photoresist arranged on a workpiece, such as a semiconductor wafer. Additional examples of semiconductor fabrication processes include, but are not limited to, chemical-mechanical polishing (CMP), etching, deposition, and ion implantation. An arrangement of multiple semiconductor devices fabricated on a single semiconductor wafer may be separated into individual semiconductor devices. [0005] Inspection processes are used at various steps during semiconductor manufacturing to detect defects on wafers to promote higher yield in the manufacturing process and, thus, higher profits. Inspection has always been an important part of fabricating semiconductor devices such as integrated circuits (ICs). However, as the dimensions of semiconductor devices decrease, inspection becomes even more important to the successful manufacture of acceptable semiconductor devices because smaller defects can cause the devices to fail. For instance, as the dimensions of semiconductor devices decrease, detection of defects of decreasing size has become necessary because even relatively small defects may cause unwanted aberrations in the semiconductor devices. [0006] Defect review typically involves re-detecting defects that were detected by an inspection process and generating additional information about the defects at a higher resolution using either a high magnification optical system or a scanning electron microscope (SEM). Defect review is typically performed at discrete locations on specimens where defects have been detected by inspection. The higher resolution data for the defects generated by defect review is more suitable for determining attributes of the defects such as profile, roughness, or more accurate size information. [0007] Photolithography can have defects driven by the quantized nature of light and materials. For example, light is quantized into photons, and the chemical reactants in photoresist are discrete molecules. These are often called shot noise defects or stochastic defects. These stochastic defects can be prevalent for extreme ultraviolet (EUV) lithography, but can appear at exposure wavelengths used in other lithographic processes such as ArF immersion. “Stochastic” means that the average behavior may be within desired specification (e.g., photoresist width, tip-to-tip measurement for line-ends, or photoresist thickness) while simultaneously exhibiting fluctuations that cause the pattern to fail (e.g., bridging or breaking for a line/space pattern) with a non-zero probability. Given that a workpiece includes billions of transistors, even small failure probabilities can lead to substantial yield loss. [0008] Stochastic defects may present multiple challenges in a fabrication environment. Typically, defects may be assumed to be deterministic such that a known defect will consistently be present when fabricated according to a known production recipe including a pattern of elements to be fabricated on a sample and exposure parameters. For example, process window qualification (PWQ) typically identifies process-limiting defects that always occur when exposure conditions fall outside of a process window. In an instance, a process window may define limits on the defocus associated with the position of the sample along the optical axis of the lithography tool (e.g., the focal position of the sample) or the dose of energy from the illumination source incident on the sample during exposure. [0009] EUV lithography processes used in high-end semiconductor device fabrication can result in defects on the workpiece that tend to be stochastic in nature. This can occur immediately after development of a photoresist image or further downstream such as during etc