EP-4736002-A1 - METHODS AND APPARATUS TO ANIMATE A SPLASH SCREEN

Abstract

Systems, apparatus, articles of manufacture, and methods to animate a splash screen are disclosed. An example apparatus includes a display controller (250); communication circuitry coupled to the display controller (250), memory controller circuitry configured to couple to a first memory (210) and a second memory (220), and programmable circuitry coupled to the communication circuitry and the memory controller circuitry and configured to: receive an indication from the display controller (250) to load a frame, in response to the indication from the display controller (250), cause the memory controller circuitry to copy the frame from the first memory (210) to the second memory (220), update a frame pointer used by the display controller (250) to reference the frame, and cause the display controller (250) to output the frame to a display circuit (110).

Inventors

• NORI, SEKHAR
• RAGHAVENDRA, VIGNESH
• MANDELA, Venkateswara, Rao

Assignees

• Texas Instruments Incorporated

Dates

Publication Date

20260506

Application Date

20240628

Claims (20)

1. 1 . An apparatus comprising: a display controller; communication circuitry coupled to the display controller; memory’ controller circuitry configured to couple to a first memory and a second memory; and programmable circuitry coupled to the communication circuitry’ and the memory controller circuitry’ and configured to: receive an indication from the display controller to load a frame; in response to the indication from the display controller, cause the memory controller circuitry to copy the frame from the first memory to the second memory; update a frame pointer used by the display controller to reference the frame; and cause the display controller to output the frame to a display circuit.
2. 2. The apparatus of claim 1. wherein the programmable circuitry is configured to copy the frame from the first memory to the second memory in response to a determination that a frame counter meets or exceeds a frame counter threshold.
3. 3. The apparatus of claim 2, wherein the programmable circuitry’ is configured to, in response to a determination that the frame counter has not reached the frame counter threshold, increment the frame counter.
4. 4. The apparatus of claim 1, wherein the first memory is a flash memory and the second memory’ is a random access memory’.
5. 5. The apparatus of claim 1, wherein the display controller is configured to access the frame from the second memory.
6. 6. The apparatus of claim 1, wherein the programmable circuitry is implemented using a direct memory access controller.
7. 7. The apparatus of claim 6, wherein the direct memory' access controller is configured to copy the frame from the first memory to the second memory using a first channel, the direct memory access controller is configured to update the frame pointer using a second channel, and the direct memory access controller is configured to cause the display controller to output the frame using a third channel.
8. 8. The apparatus of claim 1 , wherein the indication from the display controller is a vertical synchronization signal.
9. 9. A direct memory access controller comprising: memory interface circuitry configured to couple to a first memory and a second memory, the first memory configured to store frames for display by a display controller, the display controller configured to access the frames from the second memop : event receiver circuitry configured to receive an indication from the display controller; animation control circuitry’ coupled to the memory interface circuitry and the event receiver circuitry and configured to. in response to the indication from the display controller, cause the memory interface circuitry to read a frame from the first memory and write the frame to the second memory; and communication circuitry configured to update a frame pointer used by the display controller to reference the frame, and cause the display controller to output the frame to a display.
10. 10. The direct memory’ access controller of claim 9, wherein the indication from the display controller is a vertical synchronization signal.
11. 11. The direct memory access controller of claim 9, wherein the first memory is a flash memory and the second memory is a random access memory.
12. 12. The direct memory access controller of claim 9, wherein the memory interface circuitry is configured to, in response to a determination that a frame counter meets or exceeds a frame counter threshold, read the frame from the first memory, and write the frame to the second memory.
13. 13. The direct memory access controller of claim 12, wherein the animation control circuitry’ is configured to, in response to a determination that the frame counter does not meet or exceed the frame counter threshold, increment the frame counter.
14. 14. The direct memory access controller of claim 12, wherein the animation control circuitry is configured to modify the frame prior to the memory interface circuitry writing the frame to the second memory’.
15. 15. A method comprising: receiving an indication from a display controller; in response to the indication from the display controller, causing a frame to be copied from a first memory to a second memory; updating a frame pointer used by the display controller to reference the frame; and causing the display controller to output the frame to a display.
16. 16. The method of claim 15, wherein the frame is copied from the first memory' to the second memory in response to a determination that a frame counter meets or exceeds a frame counter threshold.
17. 17. The method of claim 16, further comprising incrementing the frame counter in response to a determination that the frame counter does not meet or exceed the frame counter threshold.
18. 18. The method of claim 15, wherein the copying of the frame from the first memory to the second memory includes reading the frame from the first memory and writing the frame to the second memory.
19. 19. The method of claim 18, further including modifying the frame prior to writing the modified frame to the second memory.
20. 20. The method of claim 15, wherein the indication from the display controller is a vertical synchronization signal.

Description

METHODS AND APPARATUS TO ANIMATE A SPLASH SCREEN [0001] This disclosure relates generally to splash screens and. more particularly, to methods and apparatus to animate a splash screen. BACKGROUND [0002] Many computing systems display an image during a boot procedure. The display of the image provides information to a user so that the user knows that the system is functional and is loading. In various compute settings, there are requirements regarding the display of such splash screens. For example, in an automotive setting, a splash screen may need to be displayed within a certain time, e.g., five hundred milliseconds (ms) of an initial boot procedure. BRIEF DESCRIPTION OF THE DRAWINGS [0003] FIG. 1 is a block diagram of an example environment in which an example animated splash screen system operates to cause display circuitry to present an animated splash screen while a main controller is initialized. [0004] FIG. 2 is a block diagram of an example implementation of the animated splash screen system of FIG. 1. [0005] FIG. 3 is a block diagram of an example implementation of the DMA controller of FIG. 2. [0006] FIG. 4 is a flowchart representative of example machine readable instructions and/or example operations that may be executed, instantiated, and/or performed by programmable circuitry to display an animated splash screen. [0007] FIG. 5 is a flowchart representative of example machine readable instructions and/or example operations that may be executed, instantiated, and/or performed by programmable circuitry to control operation of the display controller of FIG. 2. [0008] FIG. 6 is a block diagram illustrating an example progression of frames that may be provided to the display controller by the DMA controller of FIG. 2. [0009] FIG. 7 is another example block diagram illustrating an example progression of frames that may be provided to the display controller by the DMA controller of FIG. 2. [0010] FIG. 8 is a block diagram illustrating an example progression through four frames. [0011] FIG. 9 is a block diagram of an example processing platform including programmable circuitry structured to execute, instantiate, and/or perform the example machine readable instructions and/or perform the example operations of FIGS. 4 and/or 5 to implement the animated splash screen system 105 of FIG. 2. [0012] FIG. 10 is a block diagram of an example implementation of the programmable circuitry7 of FIG. 9. [0013] FIG. 11 is a block diagram of another example implementation of the programmable circuitry of FIG. 9. [0014] The same reference numbers or other reference designators are used in the drawings to designate the same or similar (functionally and/or structurally) features. [0015] The drawings are not necessarily to scale. Generally, the same reference numbers in the drawing(s) and this description refer to the same or like parts. Although the drawings show regions with clean lines and boundaries, some or all of these lines and/or boundaries may be idealized. In reality, the boundaries and/or lines may be unobservable, blended and/or irregular. DETAILED DESCRIPTION OF EXAMPLE EMBODIMENTS [0016] Splash screens are used across many different computing systems to inform a user that the computing system is functional. For example, during a boot procedure, a splash screen may be displayed to inform the user that the system is booting. Displaying such splash screens provides peace of mind to the user. In some examples, the user may wait longer before performing a corrective action to a system displaying a splash screen (e.g., pushing a “reset” button, removing and re-applying power, etc.), as compared to a system that does not utilize a splash screen. While static splash screens are beneficial, displaying an animated splash screen provides an added level of confidence to the user that the system is functioning properly. [0017] In some settings, there are requirements for how quickly a computing system must perform various boot actions. For example, in an automotive setting, such computing systems have very' stringent boot time requirements (e.g., 1-2 seconds from boot) for having the entire operating system (OS) stack operational. Moreover, sometimes there are requirements that a splash screen (e.g., an animated splash screen) must be displayed within the first two hundred milliseconds of the booting procedure. [0018] Attempting both to boot an operating system and cause display of an animated splash screen within such timing requirements is a difficult task. For example, having a central processing unit of the computing system use resources to cause display the animated splash screen early during the boot procedure might delay booting of the entire OS, resulting in the overall boot time requirement not being met. [0019] Example approaches disclosed herein utilize a system-on-a-chip (SoC) including a direct memory access (DMA) controller working in concert with a display controller to offload display of the animated