EP-4736085-A2 - SYSTEMS AND METHODS FOR EVALUATING SCALABILITY OF QUANTUM COMPUTING SYSTEMS

Abstract

Systems and methods for evaluating the scalability of quantum systems are provided. In one example, a method may include obtaining benchmark performance data for a candidate quantum system architecture. The benchmark performance data may be descriptive of one or more performance characteristics of the candidate quantum system architecture for a plurality of processor sizes. The method may include obtaining one or more scaling parameters based on the benchmark performance data, including a quantum scaling model relating processor size of the candidate quantum system architecture to the one or more performance characteristics. The method may include determining one or more scaling metrics for the candidate quantum system architecture at a scaled processor size greater than the plurality of processor sizes by the quantum scaling model. The method may include determining one or more control actions for an operational quantum system based on the one or more scaling metrics.

Inventors

• KLIMOV, Paul Victor

Assignees

• Google LLC

Dates

Publication Date

20260506

Application Date

20240625

Claims (20)

1. 1. A method for evaluating scalability of quantum systems, the method comprising: obtaining benchmark performance data for a candidate quantum system architecture, the benchmark performance data descriptive of one or more performance characteristics of the candidate quantum system architecture for a plurality of processor sizes of the candidate quantum system architecture; obtaining one or more scaling parameters based on the benchmark performance data, the one or more quantum scaling parameters comprising a quantum scaling model relating processor size of the candidate quantum system architecture to the one or more performance characteristics of the candidate quantum system architecture; determining one or more scaling metrics for the candidate quantum system architecture at a scaled processor size greater than the plurality of processor sizes by the quantum scaling model; and determining one or more control actions for an operational quantum system based on the one or more scaling metrics.
2. 2. The method of claim 1, wherein obtaining the benchmark performance data comprises: selecting a quantum algorithm; selecting one or more performance benchmarks to be representative of the quantum algorithm; and obtaining the benchmark performance data based on the one or more performance benchmarks.
3. 3. The method of claim 1, wherein obtaining the benchmark performance data comprises: selecting a hardware architecture of the candidate quantum system architecture, the hardware architecture of the candidate quantum system architecture defining structural characteristics of one or more qubits of the candidate quantum system architecture; selecting a control strategy of the candidate quantum system architecture, the control strategy defining operational characteristics of the one or more qubits of the candidate quantum system architecture; and obtaining the benchmark performance data for the candidate quantum system architecture comprising the one or more qubits configured according to the hardware architecture and the control strategy.
4. 4. The method of claim 3, wherein the structural characteristics of the one or more qubits comprise qubit type characteristics, qubit arrangement characteristics, control signal line arrangement characteristics, fabrication characteristics, and/or dependency characteristics.
5. 5. The method of claim 3, wherein the structural characteristics of the one or more qubits comprise at least one of self-capacitance, junction resistance, qubit anharmonicity, qubitcontrol mutual inductance distribution, maximum frequency, readout-resonator frequency, Josephson-junction asymmetry, two-level -system (TLS) TLS number density, TLS frequency, TLS coherence, TLS qubit-decoupling, qubit quality, qubit-control mutual inductance prime distribution, drive impedance, resonator internal quality, resonator coupling quality, resonatorqubit coupling efficiency, bandpass filter frequency, bandpass filter quality, transmon frequency, T1 spectrum, single qubit frequency, or qubit grid frequency.
6. 6. The method of claim 3, wherein the operational characteristics of the one or more qubits comprise one or more operating frequencies of the one or more qubits.
7. 7. The method of claim 3, wherein the operational characteristics of the one or more qubits comprise one or more of single qubit gate frequency trajectories, two qubit gate frequency trajectories, readout frequency trajectories, maximum/minimum operating frequencies, anharmonicity of frequencies, bias voltage, coupling efficiency, Ramsey coherence time, spinecho coherence time, CPMG dephasing time, energy-relaxation time, Rabi oscillations, pulse amplitude, pulse length, pulse frequency, single-qubit randomized benchmarking (RB) error, single-qubit cross-entropy benchmarking (XEB) error, two-qubit RB error, two-qubit XEB error, or two-qubit XEB purity error.
8. 8. The method of claim 3, wherein the operational characteristics of the one or more qubits comprise one or more uncontrolled characteristics.
9. 9. The method of claim 3, wherein the control strategy is indicative of one or more calibration interventions or one or more optimization interventions.
10. 10. The method of claim 1, wherein the benchmark performance data comprises gate error benchmark performance data, and wherein the performance characteristics of the candidate quantum system architecture comprise gate errors.
11. 11. The method of claim 1, wherein the quantum scaling parameters comprise a qubit saturation constant, a saturated gate error, and a scaling logic error penalty.
12. 12. The method of claim 11, wherein the quantum scaling model relates an average gate error at a number of qubits to a quantity comprising the scaling logic error penalty multiplied by the exponential number of qubits divided by the qubit saturation constant, the quantity subtracted from the saturated gate error.
13. 13. The method of claim 1, wherein obtaining the one or more quantum scaling parameters comprises fitting the quantum scaling model to the benchmark performance data.
14. 14. The method of claim 1, wherein determining the one or more control actions comprises implementing one or more operational characteristics of the candidate quantum system architecture in an operational quantum system.
15. 15. The method of claim 1, further comprising: obtaining second benchmark performance data for a second candidate quantum system architecture; obtaining one or more second scaling parameters based on the second benchmark performance data; determining one or more second scaling metrics for the second candidate quantum system architecture based on the one or more second scaling parameters; comparing the one or more scaling metrics to the one or more second scaling metrics and, based on the comparison, selecting one of the candidate quantum system architecture or the second quantum system; and configuring the operational quantum system according to one or more operational characteristics of the selected one of the candidate quantum system architecture or the second candidate quantum system architecture.
16. 16. A quantum computing system, comprising: quantum hardware; one or more classical processors; one or more non-transitory, computer-readable media storing instructions that, when implemented, cause the one or more classical processors to perform operations, the operations comprising: obtaining benchmark performance data for a candidate quantum system architecture, the benchmark performance data descriptive of one or more performance characteristics of the candidate quantum system architecture for a plurality of processor sizes of the candidate quantum system architecture; obtaining one or more scaling parameters based on the benchmark performance data, the one or more quantum scaling parameters comprising a scaling model relating processor size of the candidate quantum system architecture to the one or more performance characteristics of the candidate quantum system architecture; determining one or more scaling metrics for the candidate quantum system architecture at a scaled processor size greater than the plurality of processor sizes by the scaling model; and determining one or more control actions for the quantum hardware based on the one or more scaling metrics.
17. 17. The quantum computing system of claim 16, wherein obtaining the benchmark performance data comprises: selecting a hardware architecture of the candidate quantum system architecture, the hardware architecture of the candidate quantum system architecture defining structural characteristics of one or more qubits of the candidate quantum system architecture; selecting a control strategy of the candidate quantum system architecture, the control strategy defining operational characteristics of the one or more qubits of the candidate quantum system architecture; and obtaining the benchmark performance data for the candidate quantum system architecture comprising the one or more qubits configured according to the hardware architecture and the control strategy.
18. 18. The quantum computing system of claim 16, wherein obtaining the one or more quantum scaling parameters comprises fitting the scaling model to the benchmark performance data.
19. 19. The quantum computing system of claim 16, wherein the quantum scaling parameters comprise a qubit saturation constant, a saturated gate error, and a scaling logic error penalty; and wherein the scaling model relates an average gate error at a number of qubits to a quantity comprising the scaling logic error penalty multiplied by the exponential number of qubits divided by the qubit saturation constant, the quantity subtracted from the saturated gate error.
20. 20. One or more non-transitory, computer-readable media storing instructions that, when implemented, cause one or more processors to perform operations, the operations comprising: obtaining benchmark performance data for a candidate quantum system architecture, the benchmark performance data descriptive of one or more performance characteristics of the candidate quantum system architecture for a plurality of processor sizes of the candidate quantum system architecture; obtaining one or more scaling parameters based on the benchmark performance data, the one or more quantum scaling parameters comprising a scaling model relating processor size of the candidate quantum system architecture to the one or more performance characteristics of the candidate quantum system architecture; determining one or more scaling metrics for the candidate quantum system architecture at a scaled processor size greater than the plurality of processor sizes by the scaling model; and determining one or more control actions for an operational quantum system based on the one or more scaling metrics.

Description

SYSTEMS AND METHODS FOR EVALUATING SCALABILITY OF QUANTUM COMPUTING SYSTEMS FIELD [0001] The present disclosure relates generally to systems and methods for evaluating scalability of quantum computing systems. CROSS-REFERENCE TO RELATED APPLICATIONS [0002] The present application is based upon and claims the right of priority to U.S. Patent Application No. 18/364,305, filed on August 2, 2023, the disclosure of which is hereby incorporated by reference herein in its entirety for all purposes. BACKGROUND [0003] Quantum computing is a computing method that takes advantage of quantum effects, such as superposition of basis states and entanglement to perform certain computations more efficiently than a classical digital computer. In contrast to a digital computer, which stores and manipulates information in the form of bits, e.g., a “1” or “0,” quantum computing systems can manipulate information using quantum bits (“qubits”). A qubit can refer to a quantum device that enables the superposition of multiple states, e.g., data in both the “0” and “1” state, and/or to the superposition of data, itself, in the multiple states. In accordance with conventional terminology, the superposition of a “0” and “1” state in a quantum system may be represented, e.g., as a |0) + b 11) The “0” and “1” states of a digital computer are analogous to the |0) and 11) basis states, respectively of a qubit. SUMMARY [0004] Aspects and advantages of embodiments of the present disclosure will be set forth in part in the following description, or can be learned from the description, or can be learned through practice of the embodiments. [0005] One example aspect of the present disclosure is directed to a method for evaluating scalability of quantum systems. The method may include obtaining benchmark performance data for a candidate quantum system architecture. The benchmark performance data may be descriptive of one or more performance characteristics of the candidate quantum system architecture for a plurality of processor sizes of the candidate quantum system architecture. The method may include obtaining one or more scaling parameters based on the benchmark performance data. The one or more quantum scaling parameters may include a quantum scaling model relating processor size of the candidate quantum system architecture to the one or more performance characteristics of the candidate quantum system architecture. The method may include determining one or more scaling metrics for the candidate quantum system architecture at a scaled processor size greater than the plurality of processor sizes by the quantum scaling model. The method may include determining one or more control actions for an operational quantum system based on the one or more scaling metrics. [0006] These and other features, aspects, and advantages of various embodiments of the present disclosure will become better understood with reference to the following description and appended claims. The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate example embodiments of the present disclosure and, together with the description, explain the related principles. BRIEF DESCRIPTION OF THE DRAWINGS [0007] Detailed discussion of embodiments directed to one of ordinary skill in the art is set forth in the specification, which refers to the appended figures, in which: [0008] FIG. 1 depicts an example of a quantum computing system according to example aspects of the present disclosure; [0009] FIG. 2 depicts a diagram of an example system for evaluating scalability of candidate quantum system architecture according to aspects of the present disclosure; [0010] FIG. 3 depicts a plot of an example of benchmark performance data with respective scaling models for a given performance benchmark according to aspects of the present disclosure; [0011] FIG. 4 depicts a flow chart diagram of an example method for evaluating scalability of a candidate quantum system architecture according to example aspects of the present disclosure; [0012] FIG. 5 A depicts a block diagram of an example computing system for implementing calibration model evaluation according to example aspects of the present disclosure; [0013] FIG. 5B depicts a block diagram of an example computing device for implementing calibration model evaluation according to example aspects of the present disclosure; and [0014] FIG. 5C depicts a block diagram of an example computing device for implementing calibration model evaluation according to example aspects of the present disclosure. DETAILED DESCRIPTION [0015] Example embodiments according to some aspects of the present disclosure are directed to systems and methods for evaluating scalability of quantum computing systems. Evaluating the scalability of a quantum computing system, which can typically include a quantum processor configured according to an architecture and control system, may be nontrivial. For instance, building larger