EP-4736235-A1 - INTERPOSER STITCH THROUGH A TOP CHIPLET

Abstract

Embodiments herein describe devices that indude an interposer with a stitch formed from overlapping exposure areas, which may result in the interposer having a total surface area that is greater than a maximum reticle field corresponding to the exposure areas. Two or more Integrated circuits (e.g., chiplets) can be disposed on the interposer. At least one of the integrated circuits is disposed over the stitch. The interposer can provide chip-to-chip connections between the integrated circuits.

Inventors

• VOOGEL, MARTIN L.

Assignees

• Xilinx, Inc.

Dates

Publication Date

20260506

Application Date

20240628

Claims (15)

1. 1. A device, comprising: an interposer with a stitch formed from overlapping exposure areas; and two or more integrated circuits (ICs) disposed on the interposer, wherein a first IC of the two or more ICs is disposed over the stitch, wherein the two or more ICs are connected via the interposer.
2. 2. The device of claim 1 , wherein a total surface area of the interposer is greater than a maximum reticle field corresponding to the exposure areas.
3. 3. The device of claim 1 , wherein the stitch aligns with a keep-out region in the first IC, and wherein the stich aligns with a region in the first IC that does not have power bumps.
4. 4. The device of claim 1 , wherein the first IC comprises a first power domain and a second power domain, wherein the stitch is aligned with a boundary between the first and second power domains.
5. 5. The device of claim 4, wherein the first power domain includes a different type of circuitry than the second power domain.
6. 6. The device of claim 1 , wherein the stitch is formed by slightly overlapping two exposure areas, wherein both of the two exposure areas is at or below the maximum reticle field.
7. 7. The device of claim 1 , wherein the first IC has a different size than a second IC of the two or more ICs.
8. 8. The device of claim 7, wherein a combined length of the first and second ICs exceeds the maximum reticle field.
9. 9. The device of claim 8, wherein the first IC has a different size than a third IC of the two or more ICs, wherein a combined length of the first and third ICs exceeds the maximum reticle field, wherein the first IC is disposed between the second and third ICs on the interposer.
10. 10. A method, comprising: forming an interposer with stitch using overlapping exposure areas; and disposing two or more ICs on the interposer, wherein a first IC of the two or more ICs is disposed over the stitch, wherein the two or more ICs are connected via the interposer.
11. 11 . The method of claim 10, wherein a total surface area of the interposer is greater than a maximum reticle field corresponding to the exposure areas.
12. 12. The method of claim 10, wherein the stitch aligns with a keep-out region in the first IC.
13. 13. The method of claim 10, wherein the first IC comprises a first power domain and a second power domain, wherein the stitch is aligned with a boundary between the first and second power domains.
14. 14. The method of claim 10, wherein the stitch is formed by slightly overlapping two exposure areas, wherein both of the two exposure areas is at or below the maximum reticle field.
15. 15. The method of claim 10, wherein the first IC has a different size than a second IC of the two or more ICs, wherein a combined length of the first and second ICs exceeds the maximum reticle field.

Description

INTERPOSER STITCH THROUGH A TOP CHIPLET TECHNICAL FIELD [0001] Examples of the present disclosure generally relate to connecting a chiplet to an interposer where the chiplet covers a stitch in the interposer. BACKGROUND [0002] Many devices include multiple integrated circuits (or dies, chips, or chiplets) that are interconnected on a substrate or interposer. That is, chip-to-chip connections can be used to form devices that are 1x2, 1x3, 1x4, etc. To facilitate multiple integrated circuits (ICs) on the same interposer, the interposer can include one or more stitches. A stitch is a region where different exposure areas overlap, permitting the interposer to have an area that exceeds a maximum reticle size. That is, stitches enable the interposer to be larger than a reticle size so that multiple ICs (which are also constrained by the reticle size) can be disposed on a same interposer. These stitches are arranged between ICs. For example, if two ICs are disposed on the same interposer in a 1x2 arrangement, the ICs are positioned on the interposer so that the stitch extends between the ICs. SUMMARY [0003] One embodiment described herein is a device that includes an interposer with a stitch formed from overlapping exposure areas and two or more integrated circuits (ICs) disposed on the interposer where a first IC of the two or more ICs is disposed over the stitch, and where the two or more ICs are connected via the interposer. [0004] One embodiment described herein is a method that includes forming an interposer with stitch using overlapping exposure areas and disposing two or more ICs on the interposer where a first IC of the two or more ICs is disposed over the stitch, and where the two or more ICs are connected via the interposer [0005] One embodiment described herein is a device that includes an interposer with a stitch formed from overlapping exposure areas, a first IC disposed on the interposer where the first IC Is disposed over the stitch, and a second IC disposed on the interposer and is not disposed over the stitch where the first and second ICs are connected using chip-to-chip connections in the interposer. BRIEF DESCRIPTION OF DRAWINGS [0006] So that the manner in which the above recited features can be understood in detail, a more particular description, briefly summarized above, may be had by reference to example implementations, some of which are illustrated in the appended drawings. It is to be noted, however, that the appended drawings illustrate only typical example implementations and are therefore not to be considered limiting of its scope. [0007] Fig. 1 illustrates an IC disposed over a stitch in an interposer, according to an example. [0008] Fig. 2 is a flowchart for forming an interposer with a stitch, according to an example. [0009] Fig. 3 illustrates an interposer with a stitch formed from two exposure areas, according to an example. [0010] Fig. 4 illustrates a design of an IC to support being disposed over a stitch in an interposer, according to an example. [0011] Fig. 5 illustrates a design of an IC to support being disposed over a stitch in an interposer, according to an example. [0012] Fig. 6 illustrates disposing multiple ICs over a stitch in an interposer, according to an example. [0013] To facilitate understanding, identical reference numerals have been used, where possible, to designate identical elements that are common to the figures. It is contemplated that elements of one example may be beneficially incorporated in other examples. DETAILED DESCRIPTION [0014] Various features are described hereinafter with reference to the figures. It should be noted that the figures may or may not be drawn to scale and that the elements of similar structures or functions are represented by like reference numerals throughout the figures. It should be noted that the figures are only intended to facilitate the description of the features. They are not intended as an exhaustive description of the embodiments herein or as a limitation on the scope of the claims. In addition, an illustrated example need not have all the aspects or advantages shown. An aspect or an advantage described in conjunction with a particular exampie is not necessarily limited to that example and can be practiced in any other examples even if not so illustrated, or if not so explicitly described. [0015] Embodiments herein describe disposing a chiplet (e.g., an IC) over a stitch in an interposer, rather than in previous solutions where a stitch is positioned between two ICs. Using stitches enables the interposer to be larger than a reticle size so that multiple dies (which are also constrained by the reticle size) can be disposed on a same interposer. To form a stitch, two exposure areas (which are at or below the reticle size and slightly overlap) can be used to fabricate the interposer. [0016] It may be impossible or impractical to align the ICs on the interposer such that the sticth is between the two ICs, which is typi