EP-4736323-A1 - DATA COMMUNICATION APPARATUS WITH RECEIVER EMPLOYING TRANSMITTER SUPPLY VOLTAGE NOISE COMPENSATION

Abstract

An apparatus, including: a first signal receiver circuit including: a first reference voltage generator configured to generate a first reference voltage that tracks noise present in a supply voltage used to generate a first single-ended signal; and a first comparator configured to generate a first signal based on a comparison of the first single-ended signal and the first reference voltage.

Inventors

• DUAN, Ying
• SON, Seuk
• CAO, Qinqing
• DEVASHYA SHIVARAMA, Panchami
• DIXIT, ABHAY
• SEJPAL, DHAVAL
• SHAIK, Mansoor Basha

Assignees

• QUALCOMM INCORPORATED

Dates

Publication Date

20260506

Application Date

20240516

Claims (20)

1. 1. An apparatus, comprising: a first reference voltage generator; a first comparator including a first input configured to receive a single-ended data signal, and a second input coupled to the first reference voltage generator; a filter configured to receive a single-ended clock signal; and a control circuit including an input coupled to an output of the filter, and an output coupled to the first reference voltage generator.
2. 2. The apparatus of claim 1, wherein the filter comprises a resistor coupled in series with a capacitor between a node configured to receive the single-ended clock signal and a voltage rail, wherein the output of the filter is situated between the resistor and the capacitor.
3. 3. The apparatus of claim 1, wherein the control circuit comprises: an operational amplifier including a first input coupled to the output of the filter; and a first field effect transistor (FET) coupled between a first voltage rail and a second input of the operational amplifier, wherein the first FET includes a gate coupled to an output of the operational amplifier, and wherein the output of the operational amplifier is coupled to the first reference voltage generator.
4. 4. The apparatus of claim 3, wherein the control circuit further comprises: a current source coupled between the first voltage rail and the second input of the operational amplifier; and a resistor coupled between the current source and a second voltage rail.
5. 5. The apparatus of claim 3, wherein the first reference voltage generator comprises: a current source coupled in series with a resistor between the first voltage rail and a second voltage rail; and a second FET coupled between the first voltage rail and the resistor, wherein the second FET includes a gate coupled to the output of the operational amplifier.
6. 6. The apparatus of claim 1, further comprising: a second reference voltage generator coupled to the control circuit; a second comparator including a first input configured to receive the single-ended clock signal, and a second input coupled to the second reference voltage generator; and a sampling circuit including a first input coupled to an output of the first comparator, a second input coupled to an output of the second comparator, and an output configured to generate an output data signal.
7. 7. An apparatus, comprising: a first signal receiver circuit comprising: a first reference voltage generator configured to generate a first reference voltage that tracks noise present in a supply voltage used to generate a first single-ended signal; and a first comparator configured to generate a first signal based on a comparison of the first single-ended signal and the first reference voltage.
8. 8. The apparatus of claim 7, further comprising a noise detection and control circuit configured to generate a supply voltage noise signal related to the noise present in the supply voltage, wherein the first reference voltage is based on the supply voltage noise signal.
9. 9. The apparatus of claim 8, wherein the first single-ended signal comprises a clock signal.
10. 10. The apparatus of claim 9, wherein the noise detection and control circuit comprises a filter configured to filter the clock signal to generate the supply voltage noise signal.
11. 11. The apparatus of claim 10, wherein the filter comprises a resistor coupled in series with a capacitor, wherein the filter is configured to generate the supply voltage noise signal at a node between the resistor and the capacitor.
12. 12. The apparatus of claim 9, wherein the noise detection and control circuit is configured to generate a control signal based on the supply voltage noise signal, wherein the first reference voltage is based on the control signal.
13. 13. The apparatus of claim 12, wherein the noise detection and control circuit comprises: a current source; a resistor coupled in series with the current source between first and second voltage rails; a field effect transistor (FET) coupled between the first voltage rail and the resistor; and an operational amplifier including a first input configured to receive the supply voltage noise signal, a second input coupled to a node between the FET and the resistor, and an output coupled to a gate of the FET, wherein the output of the operational amplifier is configured to produce the control signal.
14. 14. The apparatus of claim 13, wherein the current source comprises a current digital-to-analog converter (DAC).
15. 15. The apparatus of claim 13, wherein the FET comprises a p-channel metal oxide semiconductor FET.
16. 16. The apparatus of claim 12, wherein the first reference voltage generator comprises: a current source; a resistor coupled in series with the current source between first and second voltage rails; and a field effect transistor (FET) coupled between the first voltage rail and the resistor, wherein a gate of the FET is configured to receive the control signal to generate the first reference voltage at a node between the FET and the resistor.
17. 17. The apparatus of claim 16, wherein the current source comprises a current digital-to-analog converter (DAC).
18. 18. The apparatus of claim 16, wherein the FET comprises a p-channel metal oxide semiconductor FET.
19. 19. The apparatus of claim 7, further including a second signal receiver circuit, comprising: a second reference voltage generator configured to generate a second reference voltage that tracks noise present in the supply voltage used to generate a second single- ended signal; and a second comparator configured to generate a second signal based on a comparison of the second single-ended signal and the second reference voltage.
20. 20. The apparatus of claim 19, wherein the first single-ended signal comprises a clock signal, and the second single-ended signal comprises a data signal.

Description

DATA COMMUNICATION APPARATUS WITH RECEIVER EMPLOYING TRANSMITTER SUPPLY VOLTAGE NOISE COMPENSATION CROSS-REFERENCE TO RELATED APPLICATION(S) [0001] This application claims priority to and the benefit of Non-Provisional Patent Application Serial No. 18/345,589 filed in the United States Patent Office on June 30, 2023, the entire content of which is incorporated herein as if fully set forth in its entirety and for all applicable purposes. FIELD [0002] Aspects of the present disclosure relate generally to data communication links, and in particular, to a single-ended data communication apparatus including a receiver employing transmitter supply voltage noise compensation for improved received data detection. BACKGROUND [0003] Data communication links, such as serializer/deserializer (SERDES) links, are used to communicate data signals between integrated circuits (ICs) and other components. Some of the data communication links communicate data via single-ended signaling as it may save power, circuit footprint, and is generally less complex than a data communication link that uses differential signaling. SUMMARY [0004] The following presents a simplified summary of one or more implementations in order to provide a basic understanding of such implementations. This summary is not an extensive overview of all contemplated implementations, and is intended to neither identify key or critical elements of all implementations nor delineate the scope of any or all implementations. Its sole purpose is to present some concepts of one or more implementations in a simplified form as a prelude to the more detailed description that is presented later. [0005] An aspect of the disclosure relates to an apparatus. The apparatus includes: a first reference voltage generator; a first comparator including a first input configured to receive a single-ended data signal, a second input coupled to the first reference voltage generator; a filter configured to receive a single-ended clock signal; and a control circuit including an input coupled to an output of the filter, and an output coupled to the first reference voltage generator. [0006] Another aspect of the disclosure relates to an apparatus. The apparatus includes: a first signal receiver circuit comprising: a first reference voltage generator configured to generate a first reference voltage that tracks noise present in a supply voltage used to generate a first single-ended signal; and a first comparator configured to generate a first signal based on a comparison of the first single-ended signal and the first reference voltage. [0007] Another aspect of the disclosure relates to a method. The method includes generating a reference voltage that tracks a noise in a supply voltage used to generate a single-ended data signal; and comparing the single-ended data signal with the reference voltage to generate a data signal. [0008] Another aspect of the disclosure relates to an apparatus. The apparatus includes means for generating a reference voltage that tracks a noise in a supply voltage used to generate a single-ended data signal; and means for comparing the single-ended data signal with the reference voltage to generate a data signal. [0009] Another aspect of the disclosure relates to a wireless communication device. The wireless communication device includes: at least one antenna; a transceiver coupled to the at least one antenna; one or more signal processing cores coupled to the transceiver via a set of one or more signal transmitter circuits and a set of one or more signal receiver circuits, wherein at least one of the set of one or more signal receiver circuits, comprises: a reference voltage generator configured to generate a reference voltage that tracks noise present in a supply voltage used in at least one of the set of one or more signal transmitter circuits; and a comparator configured to generate a received signal based on a comparison of a single-ended signal generated by the at least one of the set of one or more signal transmitter circuits and the reference voltage. [0010] To the accomplishment of the foregoing and related ends, the one or more implementations include the features hereinafter fully described and particularly pointed out in the claims. The following description and the annexed drawings set forth in detail certain illustrative aspects of the one or more implementations. These aspects are indicative, however, of but a few of the various ways in which the principles of various implementations may be employed and the description implementations are intended to include all such aspects and their equivalents. BRIEF DESCRIPTION OF THE DRAWINGS [0011] FIG. 1 illustrates a block diagram of an example data communication apparatus in accordance with an aspect of the disclosure. [0012] FIG. 2 illustrates a block diagram of another example data communication apparatus in accordance with another aspect of the disclosure. [0013] FIG. 3 illustrates a block diagram o