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EP-4737408-A1 - SUBSTRATE AND SEMICONDUCTOR PACKAGE COMPRISING THE SAME

EP4737408A1EP 4737408 A1EP4737408 A1EP 4737408A1EP-4737408-A1

Abstract

According to the present disclosure, a substrate comprises a glass core. The glass core comprises a through via penetrating the glass core in a thickness direction. A diameter of the through via is 50 µm to 100 µm. A sum of a sulfur content (atomic %) and a nitrogen content (atomic %) of the glass core is 0.2 atomic % to 8 atomic %. In this case, it may be possible to provide a substrate that achieves more stable electrical connection through the glass core and exhibits stable durability and electrical reliability even under a high-humidity environment.

Inventors

  • KIM, SUNGJIN
  • KIM, JINCHEOL

Assignees

  • Absolics Inc.

Dates

Publication Date
20260506
Application Date
20251028

Claims (15)

  1. A substrate comprising: a glass core, wherein the glass core comprises a through via penetrating the glass core in a thickness direction, wherein a diameter of the through via is 50 µm to 100 µm, and wherein a sum of a sulfur content (atomic %) and a nitrogen content (atomic %) of the glass core is 0.2 atomic % to 8 atomic %.
  2. The substrate of claim 1, wherein the glass core comprises 0.1 atomic % to 3 atomic % of sulfur.
  3. The substrate of claim 1, wherein the glass core comprises 0.1 atomic % to 5 atomic % of nitrogen.
  4. The substrate of claim 1, wherein the glass core comprises an upper surface and a lower surface facing the upper surface, wherein the through via has a diameter varying along the thickness direction of the substrate, and wherein the through via comprises a first opening in contact with the upper surface of the glass core, a second opening in contact with the lower surface of the glass core, and a minimum inner diameter portion having a smallest diameter and connecting the first opening and the second opening.
  5. The substrate of claim 4, wherein the through via comprises an internal space and a via inner wall surrounding the internal space, and when observed in a cross-section in the thickness direction of the glass core, an angle formed between the via inner wall connecting the minimum inner diameter portion and the first opening and a vertical line to the upper surface of the glass core is 0.1° to 8°.
  6. The substrate of claim 1, wherein the through via comprises an internal space and a via inner wall surrounding the internal space, wherein the substrate further comprises a conductive layer formed on the via inner wall, wherein the conductive layer comprises a seed layer and a conductor layer disposed on the seed layer, and wherein a thickness of the seed layer is 50 nm to 500 nm.
  7. The substrate of claim 1, further comprising an insulating layer disposed on the glass core, wherein the insulating layer comprises an insulating resin, and a hydrophilicity index (Ih) of the insulating layer represented by Equation 1 below is 7 to 12: Ih = Rc c Rc o wherein Rcc is an abundance ratio of carbon-carbon bonds to total carbon-element bonds, and Rco is an abundance ratio of carbon-oxygen bonds to total carbon-element bonds.
  8. The substrate of claim 7, wherein the insulating layer further comprises a filler, wherein the filler comprises silica, and a moisture resistance index (Irw) of the insulating layer represented by Equation 2 below is 0.03 % to 0.1 %: Irw = Rso % + Rsc % wherein Rso is an abundance ratio (%) of Si-O single bonds to total Si-element bonds, and Rsc is an abundance ratio (%) of Si-C single bonds to total Si-element bonds.
  9. The substrate of claim 7, wherein an abundance ratio of carbon-carbon double bonds to total carbon-element bonds of the insulating layer is 12 % to 17 %.
  10. The substrate of claim 7, wherein a moisture absorption rate measured after immersion in water at 23 °C for 24 hours is 0.1 % or less.
  11. The substrate of claim 7, wherein a tensile strength is 60 MPa or more.
  12. The substrate of claim 8, wherein the filler further comprises a metal oxide, and wherein the filler comprises 30 wt % to 70 wt % of the metal oxide.
  13. The substrate of claim 7, wherein the insulating resin comprises an epoxy-based resin, and wherein the epoxy-based resin comprises a first residue derived from a bisphenol-type epoxy-based resin and a second residue derived from a novolac-type epoxy-based resin.
  14. The substrate of claim 1, wherein the substrate is for use in a semiconductor package.
  15. A substrate comprising: a glass core; and an insulating layer disposed on the glass core, wherein the insulating layer comprises an insulating resin, and a hydrophilicity index (Ih) of the insulating layer represented by Equation 1 below is 7 to 12: Ih = Rc c Rc o wherein Rec is an abundance ratio of carbon-carbon bonds to total carbon-element bonds, and Rco is an abundance ratio of carbon-oxygen bonds to total carbon-element bonds.

Description

This application claims the priority benefit of U.S. Provisional Patent Application No. 63/714,155, filed on October 31, 2024, and U.S. Provisional Patent Application No. 63/714,157, filed on October 31, 2024. TECHNICAL FIELD The present disclosure relates to a substrate and semiconductor package including the same. BACKGROUND In manufacturing electronic components, implementing a circuit on a semiconductor wafer is called a front-end process (FE: Front-End), and assembling the wafer into a state usable in an actual product is called a back-end process (BE: Back-End), and a packaging process is included in the back-end process. Recently, the four core technologies of the semiconductor industry that have enabled the rapid development of electronic products are semiconductor technology, semiconductor packaging technology, manufacturing process technology, and software technology. Although semiconductor technology has developed in various forms, such as sub-micron to nanometer-scale line widths, more than tens of millions of cells, high-speed operation, and significant heat dissipation, the technology to perfectly package the same has not been sufficiently supported in comparison. Accordingly, the electrical performance of a semiconductor may be determined by the packaging technology and the resulting electrical connection rather than by the performance of the semiconductor technology itself. As materials for a substrate 100, ceramic or resin is applied. In the case of a ceramic substrate, it is not easy to mount a high-performance, high-frequency semiconductor device due to a high resistance value or a high dielectric constant. In the case of a resin substrate, although a high-performance, high-frequency semiconductor device can be mounted relatively, there is a limitation in reducing the pitch of wiring. Recently, studies have been conducted in which silicon or glass is applied as a high-end substrate 100. By forming a through hole in a silicon or glass substrate and applying an electrically conductive material to the through hole, the wiring length between a device and a motherboard can be shortened and excellent electrical characteristics can be obtained. SUMMARY A substrate according to one embodiment of the present specification comprises a glass core. The glass core comprises a through via penetrating the glass core in a thickness direction. A diameter of the through via is 50 µm to 100 µm. A sum of a sulfur content (atomic %) and a nitrogen content (atomic %) of the glass core may be 0.2 atomic % to 8 atomic %. The glass core comprises 0.1 atomic % to 3 atomic % of sulfur. The glass core may comprise 0.1 atomic % to 5 atomic % of nitrogen. The through via may comprise an internal space and a via inner wall surrounding the internal space. The glass core may comprise an upper surface and a lower surface facing the upper surface. The through via may have a diameter varying in the thickness direction of the substrate. The through via may comprise a first opening in contact with the upper surface of the glass core, a second opening in contact with the lower surface of the glass core, and a minimum inner diameter portion having a smallest diameter and connecting the first opening and the second opening. When observed in a cross-section in the thickness direction of the glass core, an angle formed between the via inner wall connecting the minimum inner diameter portion and the first opening and a vertical line to the upper surface of the glass core may be 0.1° to 8°. The substrate may comprise a conductive layer formed on the via inner wall. The conductive layer may comprise a seed layer and a conductor layer disposed on the seed layer. A thickness of the seed layer may be 50 nm to 500 nm. The substrate may further comprise an insulating layer disposed on the glass core. The insulating layer may comprise an insulating resin. A hydrophilicity index (Ih) of the insulating layer represented by Equation 1 below may be 7 to 12. Ih=RccRco In Equation 1, the Rcc value is an abundance ratio of carbon-carbon bonds to total carbon-element bonds, and the Rco value is an abundance ratio of carbon-oxygen bonds to total carbon-element bonds. The insulating layer may comprise a filler. The filler may comprise silica. A moisture resistance index (Irw) of the insulating layer represented by Equation 2 below may be 0.03 % to 0.1 %.Irw=Rso%+Rsc% In Equation 2, the Rso value is an abundance ratio (%) of Si-O single bonds to total Si-element bonds, and the Rsc value is an abundance ratio (%) of Si-C single bonds to total Si-element bonds. An abundance ratio of carbon-carbon double bonds to total carbon-element bonds of the insulating layer may be 12 % to 17 %. A moisture absorption rate of the substrate measured after immersion in water at 23 °C for 24 hours may be 0.1 % or less. A tensile strength of the substrate may be 60 MPa or more. The filler may further comprise a metal oxide. The filler may comprise 30 wt % to 70 wt % of