EP-4737914-A1 - POWER DETECTOR

Abstract

A power detector according to an aspect of the present invention includes a main current mirror circuit that outputs a detection current indicating power of a high-frequency signal from an output end, a reference current mirror circuit that is the same as the main current mirror circuit, a current mirror circuit for connection that has an input end connected to an output end of the reference current mirror circuit and has an output end connected to the main output end to output a reference current, and a differential amplifier that generates a power detection signal based on an input voltage of an initial-stage transistor, to which the high-frequency signal is input, in the main current mirror circuit and an input bias voltage of a corresponding transistor, which corresponds to the initial-stage transistor, in the reference current mirror circuit, in which the input bias voltage of the initial-stage transistor in the main current mirror circuit is set based on a first reference current, and the input bias voltage of the corresponding transistor in the reference current mirror circuit is set based on a total current of a deviation current between the detection current and the reference current and a second reference current.

Inventors

• KAMIDAKI CHIHIRO

Assignees

• Fujikura Ltd.

Dates

Publication Date

20260506

Application Date

20240624

Claims (9)

1. A power detector comprising: a main current mirror circuit that is configured to rectify a high-frequency signal to output, from a main output end, a detection current indicating power of the high-frequency signal; a reference current mirror circuit that has the same circuit configuration and circuit performance as the main current mirror circuit; a current mirror circuit for connection that has an input end connected to a reference output end of the reference current mirror circuit and has a connection output end connected to the main output end to output a reference current; and a differential amplifier that is configured to differentially amplify an input voltage of an initial-stage transistor, to which the high-frequency signal is input, in the main current mirror circuit and an input bias voltage of a corresponding transistor, which corresponds to the initial-stage transistor, in the reference current mirror circuit to generate a power detection signal, wherein the input bias voltage of the initial-stage transistor in the main current mirror circuit is set based on a first reference current, the input bias voltage of the corresponding transistor in the reference current mirror circuit is set based on a total current of a deviation current between the detection current and the reference current and a second reference current, and the first reference current and the second reference current are the same.
2. The power detector according to Claim 1, wherein the main current mirror circuit includes a first main current mirror circuit that is configured of n-type transistors and includes the initial-stage transistor, and a second main current mirror circuit that is connected to an output end of the first main current mirror circuit and is configured of p-type transistors, and the reference current mirror circuit includes a first reference current mirror circuit that is configured of n-type transistors and includes the corresponding transistor, and a second reference current mirror circuit that is connected to an output end of the first reference current mirror circuit and is configured of p-type transistors.
3. The power detector according to Claim 2, wherein mirror ratios of the second main current mirror circuit and the second reference current mirror circuit are set to values larger than 1.
4. The power detector according to Claim 2 or 3, wherein mirror ratios of the first main current mirror circuit and the first reference current mirror circuit are set to 1 or values smaller than 1.
5. The power detector according to any one of Claims 2 to 4, wherein the n-type transistor is an n-type metal-oxide-semiconductor field effect transistor (MOSFET), and the p-type transistor is a p-type metal-oxide-semiconductor field effect transistor (MOSFET).
6. The power detector according to any one of Claims 1 to 5, wherein the differential amplifier is an instrumentation amplifier.
7. The power detector according to any one of Claims 1 to 6, further comprising: a voltage-to-current conversion circuit that is configured to convert an output voltage of the differential amplifier into a current; and a current-to-voltage conversion circuit that is configured to convert an output current of the voltage-to-current conversion circuit into a voltage.
8. The power detector according to any one of Claims 1 to 7, further comprising: a plurality of power detection units each of which includes a main circuit configured of a main rectifier, a first resistor circuit, and a second resistor circuit, a reference circuit configured of a replica rectifier, the first resistor circuit, and the second resistor circuit, and the differential amplifier, wherein the power detection signals of the plurality of power detection units are averaged to detect the power of the high-frequency signal.
9. The power detector according to any one of Claims 1 to 7, further comprising: a plurality of power detection units each of which includes a main circuit configured of a main rectifier, a first resistor circuit, and a second resistor circuit, a reference circuit configured of a replica rectifier, the first resistor circuit, and the second resistor circuit, the differential amplifier, and an opening/closing switch, wherein each of the power detection signals of the plurality of power detection units is sequentially switched by the opening/closing switch and is transmitted to an output circuit to detect the power of the high-frequency signal input to and output from each of the plurality of power detection units.

Description

TECHNICAL FIELD The present invention relates to a power detector. Priority is claimed on Japanese Patent Application No. 2023-106853, filed June 29, 2023, the content of which is incorporated herein by reference. BACKGROUND ART Patent Document 1 discloses a power detector that detects high-frequency power. As shown in FIG. 2 and the like of Patent Document 1, the power detector includes an original rectifier that performs a half-wave rectification on a high-frequency signal, a replica rectifier that has the same circuit characteristics as the original rectifier, a low-pass filter that smooths an output of the original rectifier, and a differential amplifier that is configured to differentially amplify an output of the low-pass filter and an output of the replica rectifier. Such a power detector differentially amplifies the output of the low-pass filter and the output of the replica rectifier in the differential amplifier to reduce a variation in a detection amount due to a manufacturing variation of the original rectifier or a temperature fluctuation. Citation List Patent Document Patent Document 1: United States Patent No. 6791312 SUMMARY OF INVENTION Technical Problem However, in the power detector of Patent Document 1, there is a problem that the power detector is easily affected by external noise since an output voltage of the original rectifier and an output voltage of the replica rectifier are differentially amplified using the differential amplifier. That is, in the existing power detector, the detection amount fluctuates due to the external noise, which makes it difficult to obtain an accurate detection amount. For example, since power detection of a high-frequency signal in a gigahertz band is easily affected by the external noise unlike the power detection of a low-frequency signal, suppression of the influence of the external noise in the power detector is an extremely important technical problem. The present invention has been made in view of the above circumstances, and an object of the present invention is to provide a power detector capable of suppressing an influence of external noise. Solution to problem In order to achieve the aforementioned objects, a first aspect of the present invention is a power detector including a main current mirror circuit that is configured to rectify a high-frequency signal to output, from a main output end, a detection current indicating power of the high-frequency signal, a reference current mirror circuit that has the same circuit configuration and circuit performance as the main current mirror circuit, a current mirror circuit for connection that has an input end connected to a reference output end of the reference current mirror circuit and has a connection output end connected to the main output end to output a reference current, and a differential amplifier that is configured to differentially amplify an input voltage of an initial-stage transistor, to which the high-frequency signal is input, in the main current mirror circuit and an input bias voltage of a corresponding transistor, which corresponds to the initial-stage transistor, in the reference current mirror circuit to generate a power detection signal, in which the input bias voltage of the initial-stage transistor in the main current mirror circuit is set based on a first reference current, the input bias voltage of the corresponding transistor in the reference current mirror circuit is set based on a total current of a deviation current between the detection current and the reference current and a second reference current, and the first reference current and the second reference current are the same. A second aspect of the present invention is the power detector according to the first aspect, in which the main current mirror circuit includes a first main current mirror circuit that is configured of n-type transistors and includes the initial-stage transistor, and a second main current mirror circuit that is connected to an output end of the first main current mirror circuit and is configured of p-type transistors, and the reference current mirror circuit includes a first reference current mirror circuit that is configured of n-type transistors and includes the corresponding transistor, and a second reference current mirror circuit that is connected to an output end of the first reference current mirror circuit and is configured of p-type transistors. A third aspect of the present invention is the power detector according to the second aspect, in which mirror ratios of the second main current mirror circuit and the second reference current mirror circuit are set to values larger than 1. A fourth aspect of the present invention is the power detector according to the second or third aspect, in which mirror ratios of the first main current mirror circuit and the first reference current mirror circuit are set to 1 or values smaller than 1. A fifth aspect of the present invention is the power detecto