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EP-4738333-A1 - DISPLAY DEVICE

EP4738333A1EP 4738333 A1EP4738333 A1EP 4738333A1EP-4738333-A1

Abstract

Disclosed is a display device (1), including: a display panel (50) including a display region (AA) in which pixels (PX) are disposed and a non-display region (NA) disposed around the display region (AA); and at least one gate driver (20) configured to apply a scan signal and a light emission signal to the pixels (PX). A compensation capacitor (C2) is shorted during a light emission period (I5) but receives a direct current voltage during at least one other driving period.

Inventors

  • Ahn, Soonsung
  • KIM, YANGWAN

Assignees

  • LG Display Co., Ltd.

Dates

Publication Date
20260506
Application Date
20250827

Claims (15)

  1. A display device (1), comprising: a display panel (50) including a display region (AA) and a non-display region (NA) around the display region (AA), the display region (AA) including pixels (PX); and at least one gate driver (20) configured to apply a scan signal and a light emission signal to the pixels (PX), wherein at least one pixel of the pixels (PX) includes: a light emitting diode (LD) including an anode electrode (171), a cathode electrode (173), and a light emitting layer (172) between the anode electrode (171) and the cathode electrode (173); a driving transistor (DT) having a first electrode connected to a third node (N3), a gate electrode connected to a second node (N2), and a second electrode connected to a first node (N1); a switching transistor (T1) having a first electrode connected to a data line (DL) and a second electrode connected to the gate electrode of the driving transistor (DT) at the second node (N2), the switching transistor (T1) having a gate electrode that receives a first scan signal (SC1); a first initialization transistor (T2) having a first electrode connected to a reference voltage line (VrefL) and a second electrode connected to the second electrode of the switching transistor (T1) and the gate electrode of the driving transistor (DT) at the second node (N2), the first initialization transistor (T2) having a gate electrode that receives a second scan signal (SC2); a first light emission transistor (T4) having a first electrode connected to a high potential driving voltage line (PL1) and a second electrode connected to the first electrode of the driving transistor (DT) at the third node (N3), the first light emission transistor (T4) having a gate electrode that receives a first light emission signal (EM1); a second light emission transistor (T5) having a first electrode connected to the second electrode of the driving transistor (DT) at the first node (N1) and a second electrode connected to the anode electrode (171) of the light emitting diode (LD) at a fourth node (N4), the second light emission transistor (T5) having a gate electrode that receives a second light emission signal (EM2); a first capacitor (C1) having a first electrode connected to the second electrode of the switching transistor (T1), the second electrode of the first initialization transistor (T2), and the gate electrode of the driving transistor (DT) at the second node (N2) and a second electrode connected to the second electrode of the driving transistor (DT) and the first electrode of the second light emission transistor (T5) at the first node (N1); and a second capacitor (C2) having a first electrode connected to the second electrode of the first capacitor (C1), the second electrode of the driving transistor (DT), and the first electrode of the second light emission transistor (T5) at the first node (N1) and a second electrode connected to the second electrode of the second light emission transistor (T5) and the anode electrode (171) of the light emitting diode (LD) at the fourth node (N4), wherein the driving transistor (DT) includes an oxide semiconductor layer.
  2. The display device (1) of claim 1, wherein the driving transistor (DT), the switching transistor (T1), the first initialization transistor (T2), the first light emission transistor (T4), and the second light emission transistor (T5) are n-type transistors.
  3. The display device (1) of claim 1 or 2, wherein the at least one pixel (PX) further includes: a second initialization transistor (T3) including a first electrode connected to a bias voltage line (VARL), a second electrode connected to the anode electrode (171) of the light emitting diode (LD), the second electrode of the second capacitor (C2), and the second electrode of the second light emission transistor (T5) at the fourth node (N4), and a gate electrode receiving a third scan signal (SC3).
  4. The display device (1) of any of claims 1 to 3, further comprising: a shielding metal (102) that overlaps the driving transistor (DT, TFT1), wherein one of the first and second electrodes of one of the first and second capacitors (C1, C2) is on a same layer as the shielding metal (102), and one of the first and second electrodes of the other one of the first and second capacitors (C1, C2) is on a same layer as the gate electrode (125) of the driving transistor (DT, TFT1).
  5. The display device (1) of any of claims 1 to 4, wherein the first capacitor (C1) is a storage capacitor and the second capacitor (C2) is a compensation capacitor in series with the storage capacitor.
  6. The display device (1) of claim 5, wherein a portion of the first capacitor (C1) and a portion of the second capacitor (C2) overlap.
  7. The display device (1) of claim 5 or 6, wherein the second electrode of the second capacitor (C2) receives a fixed direct current voltage (VAR) during a first period (I1) and the first electrode and the second electrode of the second capacitor (C2) have a same potential during a second period (I2) that is different from the first period (I1).
  8. The display device (1) of claim 1, wherein the first light emission transistor (T4) is a p-type transistor.
  9. The display device (1) of claim 8, wherein the at least one gate driver (20) includes a plurality of transistors that have a same structure as the first light emission transistor (T4).
  10. The display device (1) of any of claims 1 to 9, wherein in the non-display region (NA), the at least one gate driver (20) includes a plurality of scan drivers (21, 21, 23), and wherein, in at least one of the plurality of scan drivers (21, 22, 23), one stage circuit is connected to one pixel row, and in remaining other scan drivers, one stage circuit is connected to two adjacent pixel rows.
  11. The display device (1) of any of claims 1 to 10, wherein in the non-display region (NA), the at least one gate driver (20) includes a plurality of light emission control drivers, and wherein at least one among the plurality of light emission control drivers applies a same light emission signal (EM1) to two adjacent pixel rows, the same light emission signal (EM2) being the first light emission signal or the second light emission signal.
  12. The display device (1) of any of claims 1 to 11, further comprising: a low potential driving voltage (PL2) line that surrounds a periphery of the display panel (50) in the non-display region (NA), wherein the low potential driving voltage line (PL2) is on an outer side more than the at least one gate driver (20).
  13. The display device (1) of claim 12, further comprising: a dam (DAM1, DAM2) having a portion that overlaps a portion of the low potential driving voltage line (PL2); and a touch electrode connection line (192, 194) that overlaps the dam (DAM1, DAM2).
  14. The display device (1) of claim 13, wherein the touch electrode connection line (192, 194) includes a double wiring structure.
  15. The display device of any of claims 1 to 14, further configured such that: the at least one of the pixels (PX) is driven during a plurality of periods (I1, I2, ..., I5) including a light emission period (I5) during which the first electrode and the second electrode of the second capacitor (C2) are short circuited while the second light emission transistor (T5) is turned on during the light emission period (I5), and during at least another one of the plurality of periods (I1, I2, ..., I5) a direct current voltage (VAR) is applied to the second electrode of the second capacitor (C2) while the light emission transistor (T5) is turned off.

Description

CROSS REFERENCE TO RELATED APPLICATION The present application claims priority to Republic of Korea Patent Application No. 10-2024-0152994 filed on October 31, 2024. FIELD The present disclosure is to improve a flicker performance and reliability of a display panel. BACKGROUND An electroluminescent display is classified into an inorganic electroluminescent display and an organic electroluminescent display depending on a material of an emission layer. An active matrix organic light emitting diode (OLED) display includes OLEDs (organic light emitting diode) capable of emitting light by themselves and has many advantages including fast response time, high emission efficiency, high luminance, wide viewing angle, and the like. In the organic electroluminescent display, an OLED is formed in each of the pixels. The organic electroluminescent display device has not only the fast response time, high emission efficiency, high luminance, a wide viewing angle, and the like, but also an excellent contrast ratio and color reproductivity because the black scale can be expressed in a full black color. The pixels of the organic electroluminescent display device include a driving element for driving the OLED and a pixel circuit that includes a capacitor connected to the driving element. There may be a difference in the electric characteristic of the driving element across pixels because of a process deviation and a device characteristic deviation caused during a manufacturing process. Such a difference may increase even more as the driving time passes by. To compensate for a difference in the electric characteristic of the driving element in the pixels, an internal compensation circuit may be added to the pixel circuit. The internal compensation circuit may sample a threshold voltage of the driving element and compensate for a gate voltage of the driving element by as much as the threshold voltage of the driving element. However, when the pixels driven by the internal compensation circuit are operated at low luminance, non-uniform luminance may be caused inside a screen of a display panel. SUMMARY An object of the present disclosure is to compensate for a threshold voltage of the driving element in real-time using the internal compensation circuit and to improve a uniformity of the luminance of the screen. Various embodiments of the present disclosure provide a display device according to claim 1. Further embodiments are described in the dependent claims. One embodiment is a display device, including: a display panel including a display region and a non-display region around the display region, the display region including pixels; and a data driver configured to apply a data voltage to the pixels; and at least one gate driver configured to apply a scan signal and a light emission signal to the pixels. At least one of the pixels may include: a light emitting diode including an anode electrode, a cathode electrode, and a light emitting layer between the anode electrode and the cathode electrode; a driving transistor having a first electrode connected to a third node, a gate electrode connected to a second node, and a second electrode connected to a first node; a switching transistor having a first electrode connected to a data line and a second electrode connected to the gate electrode of the driving transistor at the second node, the switching transistor having a gate electrode that receives a first scan signal; a first initialization transistor having a first electrode connected to a reference voltage line and a second electrode connected to the second electrode of the switching transistor and the gate electrode of the driving transistor at the second node, the first initialization transistor having a gate electrode that receives a second scan signal; a first light emission transistor having a first electrode connected to a high potential driving voltage line and a second electrode connected to the first electrode of the driving transistor at the third node, the first light emission transistor having a gate electrode that receives a first light emission signal; a second light emission transistor having a first electrode connected to the second electrode of the driving transistor at the first node and a second electrode connected to the anode electrode of the light emitting diode at a fourth node, the second light emission transistor having a gate electrode that receives a second light emission signal; a first capacitor having a first electrode connected to the second electrode of the switching transistor, the second electrode of the first initialization transistor, and the gate electrode of the driving transistor at the second node and a second electrode connected to the second electrode of the driving transistor and the first electrode of the second light emission transistor at the first node; and a second capacitor having a first electrode connected to the second electrode of the first capacitor, the second electrode of th