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EP-4738334-A1 - PIXEL, DISPLAY DEVICE INCLUDING THE PIXEL, AND ELECTRONIC DEVICE INCLUDING THE DISPLAY DEVICE

EP4738334A1EP 4738334 A1EP4738334 A1EP 4738334A1EP-4738334-A1

Abstract

A pixel (PX) includes a first transistor (T1) including a gate connected to a first node (N1), a first terminal, and a second terminal connected to the second node (N2), a third transistor (T3) which connects a sensing line (SL) to the second node, a fourth transistor (T4) which connects a power line (PL) to the first terminal of the first transistor, a first capacitor (C1), and a light-emitting element (LED). A frame period includes an active period (ACT) and a blank period (BLK). The blank period includes a sensing compensation period (PC_S) in which a threshold voltage of the first transistor is stored in the first capacitor, a sensing addressing period (PA_S) in which a sensing data voltage is applied to the first node, and a sensing period (PS) in which a sensing current corresponding to the sensing data voltage flows from the power line to the sensing line.

Inventors

  • JEONG, JUNKI
  • HWANG, JUNGHWAN
  • SEO, YOUNGWAN

Assignees

  • Samsung Display Co., Ltd.

Dates

Publication Date
20260506
Application Date
20251021

Claims (15)

  1. A pixel comprising: a first transistor (T1) comprising a gate connected to a first node (N1), a first terminal, and a second terminal connected to a second node; a second transistor (T2) which connects a data line to the first node in response to a write gate signal; a third transistor (T3) which connects a sensing line to the second node in response to an initialization gate signal; a fourth transistor (T4) which connects a power line to the first terminal of the first transistor in response to an emission signal, wherein the power line transmits a first power voltage; a first capacitor (C1) connected between the first node and the second node; and a light-emitting element (LED) comprising a first terminal connected to the second node and a second terminal which receives a second power voltage, wherein: a frame period comprises an active period (ACT) and a blank period (BLK) following the active period, and the blank period (BLK) comprises: a sensing compensation period (PC_S) in which a threshold voltage of the first transistor is stored in the first capacitor; a sensing addressing period (PA_S) in which a sensing data voltage is applied to the first node (N1), wherein the sensing addressing period is after the sensing compensation period; and a sensing period (PS) in which a sensing current corresponding to the sensing data voltage flows from the power line to the sensing line, wherein the sensing period is after the sensing addressing period.
  2. The pixel of claim 1, wherein the blank period further comprises: a sensing initialization period (PI_S) in which a reference voltage is applied to the first node and an initialization voltage is applied to the second node, wherein the sensing initialization period is before the sensing compensation period.
  3. The pixel of claim 1 or 2, wherein the blank period further comprises: a first sensing bypass period (PB1_S) in which an initialization voltage is applied to the second node (N2), wherein the first sensing bypass period is before the sensing period.
  4. The pixel of claim any of the preceding claims, wherein the blank period further comprises: a second sensing bypass period (PB2_S) in which the initialization voltage is applied to the second node (N2), wherein the second sensing bypass period is after the sensing period.
  5. The pixel of any of the preceding claims, further comprising: a second capacitor (C2) comprising a first terminal connected to the second node (N2) and a second terminal which receives a constant voltage.
  6. The pixel of claim 5, wherein the constant voltage is one of an initialization voltage and the first power voltage.
  7. The pixel of any of claims 1 to 5, wherein the second power voltage is a constant voltage having a voltage level lower than a voltage level of the first power voltage.
  8. The pixel of any of claims 1 to 7, wherein the second power voltage has a low voltage level in the active period and has a high voltage level higher than the low voltage level in the blank period.
  9. The pixel of any of the preceding claims, wherein the active period (ACT) comprises: an initialization period in which a reference voltage is applied to the first node and an initialization voltage is applied to the second node; a compensation period in which the threshold voltage of the first transistor is stored in the first capacitor, wherein the compensation period is after the initialization period; an addressing period in which a data voltage is applied to the first node, wherein the addressing period is after the compensation period; a bypass period in which the initialization voltage is applied to the second node, wherein the bypass period is after the addressing period; and an emission period in which a sensing current corresponding to the data voltage flows through the light-emitting element, wherein the emission period is after the bypass period.
  10. A display device (100) comprising: a display panel (110) comprising pixels, each of pixels being according to any of the preceding claims; a gate driver (120) which provides a write gate signal and an initialization gate signal to each of the pixels; an emission driver (130) which provides an emission signal to each of the pixels; a data driver (140) connected to each of the pixels through a data line; and a sensing circuit (150) connected to each of the pixels through a sensing line.
  11. The display device (100) of claim 10, wherein: the display panel (110) comprises a plurality of vertical blocks each comprising a plurality of pixel rows, and the gate driver (120) is configured to provide write gate signals respectively corresponding to the vertical blocks in the sensing addressing period.
  12. The display device (100) of claim 10 or 11, wherein the data driver (140) is configured to: provide the sensing data voltage corresponding to a white grayscale to each of pixel columns overlapping a sensing area, and provide the sensing data voltage corresponding to a black grayscale to each of pixel columns not overlapping the sensing area.
  13. The display device (100) of any of claims 10 to 12, wherein the blank period further comprises: a sensing initialization period in which a reference voltage is applied to the first node and an initialization voltage is applied to the second node, wherein the sensing initialization period is before the sensing compensation period, and/or wherein the blank period further comprises: a first sensing bypass period in which an initialization voltage is applied to the second node, wherein the first sensing bypass period is before the sensing period.
  14. The display device (100) of claim 13, wherein the blank period further comprises: a second sensing bypass period in which the initialization voltage is applied to the second node, wherein the second sensing bypass period is after the sensing period.
  15. An electronic device (10) comprising: a processor (12); a memory (13) connected to the processor (12); a power module (14) connected to the processor (12); and a display device (100) which receives input image data from the processor (12), and displays an image corresponding to the input image data, the display device (100) being according to any of claims 10 to 14.

Description

BACKGROUND 1. Field Embodiments relate to a display device. More particularly, embodiments relate to a pixel that emits light, a display device including the pixel, and an electronic device including the display device. 2. Description of the Related Art A display device may include pixels that emit light. Each of the pixels may include a driving transistor that generates a driving current and a light-emitting element that emits light with a luminance corresponding to the driving current. As usage time of the display device increases, the driving transistor and the light-emitting element may deteriorate. Accordingly, the degree of deterioration of the driving transistor and/or the degree of deterioration of the light-emitting element may be measured by sensing a current flowing through the pixel. SUMMARY Embodiments provide a pixel in which a sensing current, which is based on temperature (e.g., only on temperature), flows. Embodiments provide a display device in which a temperature of a display panel is accurately estimated and an electronic device including the display device. A pixel according to embodiments includes a first transistor including a gate connected to a first node, a first terminal, and a second terminal connected to a second node, a second transistor which connects a data line to the first node in response to a write gate signal, a third transistor which connects a sensing line to the second node in response to an initialization gate signal, a fourth transistor which connects a power line to the first terminal of the first transistor in response to an emission signal, wherein the power line transmits a first power voltage, a first capacitor connected between the first node and the second node, and a light-emitting element including a first terminal connected to the second node and a second terminal which receives a second power voltage. A frame period includes an active period and a blank period following the active period. The blank period includes a sensing compensation period in which a threshold voltage of the first transistor is stored in the first capacitor, a sensing addressing period in which a sensing data voltage is applied to the first node, wherein the sensing addressing period is after the sensing compensation period, and a sensing period in which a sensing current corresponding to the sensing data voltage flows from the power line to the sensing line, wherein the sensing period is after the sensing addressing period. The pixel is configured such that voltages and signals are provided to the pixel for displaying an image frame in an active period. One active period may be a period in which voltages and signals are provided to the pixel for displaying one image frame. The blank period may be positioned between adjacent active periods. In an example in which a frame period includes a first active period and a first blank period, the first blank period may be positioned between the first active period and a second active period of a second frame period following the first frame period. In an embodiment, the blank period may further include a sensing initialization period in which a reference voltage is applied to the first node and an initialization voltage is applied to the second node, wherein the sensing initialization period is before the sensing compensation period. In an embodiment, the blank period may further include a first sensing bypass period in which an initialization voltage is applied to the second node, wherein the first sensing bypass period is before the sensing period. In an embodiment, the blank period may further include a second sensing bypass period in which the initialization voltage is applied to the second node, wherein the second sensing bypass period is after the sensing period. In an embodiment, the pixel may further include a second capacitor including a first terminal connected to the second node and a second terminal which receives a constant voltage. In an embodiment, the constant voltage may be one of an initialization voltage and the first power voltage. In an embodiment, the second power voltage may be a constant voltage having a voltage level lower than a voltage level of the first power voltage. In an embodiment, the second power voltage may have a low voltage level in the active period, and may have a high voltage level higher than the low voltage level in the blank period. In an embodiment, the active period may include an initialization period in which a reference voltage is applied to the first node and an initialization voltage is applied to the second node, a compensation period in which the threshold voltage of the first transistor is stored in the first capacitor, wherein the compensation period is after the initialization period, an addressing period in which a data voltage is applied to the first node, wherein the addressing period is after the compensation period, a bypass period in which the initialization voltage is applied to the