EP-4738402-A1 - ELECTRICAL DEVICE COMPRISING A CAPACITOR FORMED USING A POROUS STRUCTURE AND CONDUCTIVE WIRES
Abstract
The present invention relates to an electrical device and a method for manufacturing thereof. The proposed device (100) comprises a capacitor including a porous structure (300), the porous structure (300) comprising: - a first electrode region (310) comprising first pores (311), wherein these first pores (311) comprise first conductive wires (312), - a second electrode region (320) comprising second pores (321), wherein these second pores (321) comprise second conductive wires (322), and - a dielectric region (330) comprising third pores (331) and interposed between the first and second electrode regions (310, 320), wherein the capacitor is formed by the first pores (311) of the first electrode region (310) and the second pores (321) of the second electrode region (320) facing each other and being separated by the third pores (331) of the dielectric region (330).
Inventors
- BUFFLE, Larry
- Voiron, Frédéric
- ARCHAMBAULT, Sophie
Assignees
- Murata Manufacturing Co., Ltd.
- Commissariat à l'Energie Atomique et aux Energies Alternatives
Dates
- Publication Date
- 20260506
- Application Date
- 20241031
Claims (15)
- An electrical device (100) comprising a capacitor including a porous structure (300), the porous structure (300) comprising: - a first capacitor electrode region (310) comprising first pores (311), wherein these first pores (311) comprise first conductive wires (312), - a second capacitor electrode region (320) comprising second pores (321), wherein these second pores (321) comprise second conductive wires (322), and - a capacitor dielectric region (330) comprising third pores (331) and interposed between the first and second capacitor electrode regions (310, 320), wherein the capacitor is formed by the first pores (311) of the first capacitor electrode region (310) and the second pores (321) of the second capacitor electrode region (320) facing each other and being separated by the third pores (331) of the capacitor dielectric region (330).
- The electrical device (100) of claim 1, wherein the first and second conductive wires (312, 322) fill the first and second pores (311, 321) of the first and second capacitor electrode regions (310, 320).
- The electrical device (100) of claim 1, wherein the first and second conductive wires (312, 322) fill partially the first and second pores (311, 321) of the first and second capacitor electrode regions (310, 320), volumes remaining empty in (the center of) these pores (311, 321).
- The electrical device (100) of any of claims 1 to 3, wherein the capacitor comprises: - a first connection region (313) comprising conductive material electrically connecting the first conductive wires (312) of the first pores (311) of the first capacitor electrode region (310), and - a second connection region (323) comprising conductive material electrically connecting the second conductive wires (322) of the second pores (321) of the second capacitor electrode region (320).
- The electrical device (100) of claim 4, wherein: - the first and second capacitor electrode regions (310, 320) comprise respectively first and second recesses so that a top surface of the first and second pores (311, 321) lies below a top surface of the porous structure (300), and - the first and second connection regions (313, 323) extend respectively in the first and second recesses of the first and second capacitor electrode regions (310, 320) so that a top surface of the first and second connection regions (313, 323) lies below or at the level of the top surface of the porous structure (300).
- The electrical device (100) of claim 4 or 5, wherein a thickness of the first and second connection regions (313, 323) is comprised between 100nm and 3µm.
- The electrical device (100) of any of claims 1 to 6, wherein the porous structure (300) comprises pores (301) extending up to lateral edges of the electrical device (100).
- The electrical device (100) of any of claims 1 to 7, wherein all or part of the third pores (331) of the capacitor dielectric region (330) comprise dielectric material (332).
- The electrical device (100) of any of claims 1 to 8, wherein the first and second capacitor electrode regions (310, 320) are arranged in an interlocking-comb structure or an interlocking spiral structure.
- The electrical device (100) of any of claims 1 to 9, wherein the electrical device (100) is configured to be used with an operating voltage measured between the first conductive wires (312) of the first capacitor electrode region (310) and the second conductive wires (322) of the second capacitor electrode region (320) exceeding 900V or 1200V.
- A method for manufacturing an electrical device (100) comprising a capacitor, the method comprising: - providing a porous structure (300), - forming first conductive wires (312) in first pores (311) of a first capacitor electrode region (310) of the porous structure (300), - forming second conductive wires (322) in second pores (321) of a second capacitor electrode region (320) of the porous structure (300), and wherein: - the porous structure (300) comprises a capacitor dielectric region (330) comprising third pores (331) and interposed between the first and second capacitor electrode regions (310, 320), - the capacitor is formed by the first pores (311) of the first capacitor electrode region (310) and the second pores (321) of the second capacitor electrode region (320) facing each other and being separated by the third pores (331) of the capacitor dielectric region (330).
- The method of claim 11, comprising: - depositing, on the porous structure (300), a mask (HM1) comprising: • at least one solid portion defining the first and second capacitor electrode regions (310, 320), • at least one opening defining the capacitor dielectric region (330), - depositing dielectric material (332) in the third pores (331) of the capacitor dielectric region (330), and - removing the mask (HM1) before forming the first and second conductive wires (312, 322) in the first and second pores (311, 321) of the first and second capacitor electrode regions (310, 320).
- The method of claim 11 or 12, comprising: - etching first and second recesses respectively in the first and second capacitor electrode regions (310, 320) so that a top surface of the first and second pores (311, 321) of these regions (310, 320) lies below a top surface of the porous structure (300), and - depositing a layer of conductive material (CL) on the porous structure (300) to form: • a first connection region (313) extending in the first recesses of the first capacitor electrode region (310) and electrically connecting the first conductive wires (312) of this region (310), and • a second connection region (323) extending in the second recesses of the second capacitor electrode region (320) and electrically connecting the second conductive wires (322) of this region (320), - planarizing the layer of conductive material (CL) so that a top surface of the first and second connection regions (313, 323) lies below or at the level of the top surface of the porous structure (300).
- The method of any of claims 11 to 13, wherein providing the porous structure (300) comprises anodizing an aluminum layer (AL) to form pores (301) on substantially an entire surface of this layer (AL).
- The method of any of claims 11 to 14, comprising depositing dielectric material (332) in the third pores (331) of the dielectric region (330) using atomic layer deposition.
Description
Field of the Invention The present invention relates to the field of electrical devices. More particularly, it relates to an electrical device comprising a capacitor and a method for manufacturing thereof. Description of Related Art The present invention lies in particular within the context of electrical devices comprising capacitors with a high capacitance density and suited for high voltage applications. In this context, the capacitor of application EP 3 992 999 A1 (hereinafter EP999 and which is hereby incorporated by reference) has been proposed. As illustrated on FIG. 1, this capacitor CAP is formed using a porous structure 105. The latter is filled with dielectric material 109 to form the capacitor dielectric 112. The capacitor electrodes 111A-111B are formed using trenches 107A-107B etched in the porous structure 105 and filled with conductive material 111. The capacitor proposed in EP999 is particularly advantageous in that it allows using thin layer deposition techniques, such as atomic layer deposition (ALD), to deposit dielectric material 109 in the pores of the porous structure 105 and obtain a thick capacitor dielectric 112 capable of withstanding high voltages. However, emerging applications, such as electric cars, require even higher capacitance density and the capability to reliably withstand even higher voltages (e.g., exceeding 900V, or 1200V). Therefore, the present invention aims to improve the capacitor of application EP999 in view of achieving higher capacitance density and withstand higher voltages. Summary of the Invention According to an aspect, the present invention provides an electrical device comprising a capacitor including a porous structure, the porous structure comprising: a first capacitor electrode region comprising first pores, wherein the first pores of this region comprise (are partially or fully filled by) first conductive wires,a second capacitor electrode region comprising second pores, wherein the second pores of this region comprise (are partially or fully filled by) second conductive wires (the first and second capacitor electrode regions are disjoint regions, the first and second pores are distinct pores, and the first and second conductive wires are distinct wires), anda capacitor dielectric region comprising third pores and interposed between the first and second capacitor electrode regions, wherein the capacitor is formed by the first pores of the first capacitor electrode region and the second pores of the second capacitor electrode region facing each other and being separated by the third pores of the capacitor dielectric region. The present invention proposes forming the capacitor electrodes by growing conductive nanowires in the pores of the porous structure (e.g., an anodized aluminum oxide structure). This provides several advantages (in addition to those of the capacitor of application EP999). First, the proposed electrical device allows achieving a higher capacitance density. In the capacitor of application EP999, the electrodes are formed by deposing conductive material in trenches using electrodeposition (ELD). As detailed hereinafter, this deposition technique limits the maximum thickness that can be used for the porous structure (unless the trenches are widened, and thus the capacitance density reduced). In contrast, the capacitor electrodes of the proposed electrical device are formed by growing (e.g., using ALD) nanowires in the pores of the porous structure. This can be achieved even for a particularly thick porous structure. The porous structure in the proposed device may be 10, 50, 100, or even 200µm thick. The proposed device hence allows forming the capacitor using a porous structure thicker than that of the capacitor of application EP999. It follows that the capacitor of the proposed device has a larger surface area of electrodes facing each other along the vertical direction (i.e., along the z-axis) and thus a higher capacitance density. Second, the proposed device allows reducing mechanical stress. In the capacitor of application EP999, the electrodes are formed by trenches in the porous structure fully filled with conductive material. Such monolithic electrodes can contribute to building mechanical stress within the capacitor. In contrast, the use of nanowires arranged in pores relaxes the mechanical stress within the capacitive structure. This contributes to preventing cracks and thus to reliably withstanding high voltages. For these reasons, the present invention provides an electrical device comprising a capacitor with a high capacitance density and able to withstand reliably high voltages. In a particular embodiment, the first and second conductive wires fill (completely) the first and second pores of the first and second capacitor electrode regions. In this embodiment, the pores of the electrode regions of the porous structure are fully filled by the conductive wires. That is, there is no volumes remaining empty in the center of th