EP-4738681-A1 - MULTILEVEL INVERTER

EP4738681A1EP 4738681 A1EP4738681 A1EP 4738681A1EP-4738681-A1

Abstract

Disclosed herein is a technique for cutting down switching loss. In a multi-level inverter (100), a control unit (60) has an initial charging control function of making initial charging of a first capacitor (C17), a second capacitor (C27), and a third capacitor (C37) during booting. The control unit (60) performs, during the initial charging control, either first control of allowing only a third switching element (Q3) and a fourth switching element (Q4) to be ON after having turned ON only the fourth switching element (Q4), or second control of allowing only the third switching element (Q3) and the fourth switching element (Q4) to be ON, and then alternately performs third control of allowing only a second switching element (Q2) and the third switching element (Q3) to be ON and fourth control of allowing only the third switching element (Q3) and the fourth switching element (Q4) to be ON.

Inventors

NAKAMURA, HIROKAZU
HEGDE, Anantha
KABASHIMA, Takamune
SUZUKI, ASAMIRA

Assignees

Panasonic Intellectual Property Management Co., Ltd.

Dates

Publication Date: 20260506
Application Date: 20240603

Claims (8)

A multi-level inverter comprising: a DC power supply unit including a positive electrode, a negative electrode, and an intermediate potential node; an inverter circuit connected between the positive electrode and the negative electrode of the DC power supply unit; and a controller configured to control the inverter circuit, the inverter circuit including: a switching circuit including a first switching element, a second switching element, a third switching element, and a fourth switching element which are connected in series to be arranged in this order from the positive electrode toward the negative electrode; a first clamping diode connected between a first connection node of the first switching element and the second switching element and the intermediate potential node; and a second clamping diode connected between a second connection node of the third switching element and the fourth switching element and the intermediate potential node, the controller including: a first gate driver configured to drive the first switching element; a second gate driver configured to drive the second switching element; a third gate driver configured to drive the third switching element; a fourth gate driver configured to drive the fourth switching element; a first bootstrap circuit including a first capacitor connected to the first gate driver in parallel and a first diode connected to the first capacitor in series; a second bootstrap circuit including a second capacitor connected to the second gate driver in parallel and a second diode connected to the second capacitor in series; a third bootstrap circuit including a third capacitor connected to the third gate driver in parallel and a third diode connected to the third capacitor in series; a power supply unit connected to the fourth gate driver in parallel; and a control unit configured to control the first gate driver, the second gate driver, the third gate driver, and the fourth gate driver, the power supply unit being connected to the third capacitor via the third diode, connected to the second capacitor via the third diode and the second diode, and connected to the first capacitor via the third diode, the second diode, and the first diode, the control unit having an initial charging control function of making initial charging of the first capacitor, the second capacitor, and the third capacitor during booting, the control unit being configured to, during the initial charging control, perform either first control of allowing only the third switching element and the fourth switching element to be ON after having turned ON only the fourth switching element or second control of allowing only the third switching element and the fourth switching element to be ON, and then alternately perform third control of allowing only the second switching element and the third switching element to be ON and fourth control of allowing only the third switching element and the fourth switching element to be ON.
The multi-level inverter of claim 1, wherein the first bootstrap circuit further includes a first resistor connected between the first diode and the first capacitor, the second bootstrap circuit further includes a second resistor connected between the second diode and the second capacitor, and the third bootstrap circuit further includes a third resistor connected between the third diode and the third capacitor.
The multi-level inverter of claim 2, wherein the control unit is configured to, when performing either the first control or the second control, set a duration of an ON period of the fourth switching element at a duration equal to or longer than a CR time constant determined by capacitance of the third capacitor and a resistance value of the third resistor of the third bootstrap circuit.
The multi-level inverter of claim 2, wherein the control unit is configured to, when performing the initial charging control, perform the first control of allowing only the third switching element and the fourth switching element to be ON after having turned ON only the fourth switching element, and the control unit is configured to, when performing the first control, set a duration of a period in which only the fourth switching element is ON at a duration equal to or longer than a CR time constant determined by capacitance of the third capacitor and a resistance value of the third resistor of the third bootstrap circuit and set a duration for which only the third switching element and the fourth switching element are ON at a duration equal to or longer than a CR time constant determined by capacitance of the second capacitor and a resistance value of the second resistor of the second bootstrap circuit.
The multi-level inverter of any one of claims 2 to 4, wherein the control unit is configured to, when performing the initial charging control, set a duration of a period in which the third control and the fourth control are repeated at a duration equal to or longer than a CR time constant determined by capacitance of the first capacitor and a resistance value of the first resistor of a plurality of the first bootstrap circuits.
The multi-level inverter of any one of claims 1 to 5, wherein the inverter circuit includes three inverter circuits, the first gate driver includes three first gate drivers, the second gate driver includes three second gate drivers, the third gate driver includes three third gate drivers, the fourth gate driver includes three fourth gate drivers, the first bootstrap circuit includes three first bootstrap circuits, the second bootstrap circuit includes three second bootstrap circuits, and the third bootstrap circuit includes three third bootstrap circuits.
The multi-level inverter of claim 6, wherein the three first bootstrap circuits are provided one to one for the three second bootstrap circuits, the three first bootstrap circuits are provided one to one for the three third bootstrap circuits, the three second bootstrap circuits are provided one to one for the three third bootstrap circuits, the power supply unit is connected to the three fourth gate drivers in parallel, the power supply unit is connected to the third capacitor via the third diode in each of the three third bootstrap circuits, the power supply unit is connected, in each of the three second bootstrap circuits, to the second capacitor via the third diode of a corresponding one of the three third bootstrap circuits and the second diode, and the power supply unit is connected, in each of the three first bootstrap circuits, to the first capacitor via the third diode of a corresponding one of the three third bootstrap circuits, the second diode of a corresponding one of the three second bootstrap circuits, and the first diode.
The multi-level inverter of any one of claims 1 to 7, wherein the power supply unit includes a DC-DC converter.

Description

Technical Field The present disclosure generally relates to a multi-level inverter, and more particularly relates to a multi-level inverter including a bootstrap circuit. Background Art Patent Literature 1 discloses a switching element driver circuit for a three-level neutral point clamping inverter in which first, second, third, and fourth switching elements are connected in series between a positive-side terminal and negative-side terminal of a DC power supply. The switching element driver circuit includes: an element driving power supply which uses a potential at a negative-side terminal thereof as a potential reference; a fourth element driving unit (fourth gate driver); a third diode; a third element driving unit (third gate driver); a third capacitor; a second diode; a second element driving unit (second gate driver); a second capacitor; a first diode; a first element driving unit (first gate driver); and a first capacitor. The fourth element driving unit is connected between a positive-side terminal and negative-side terminal of the element driving power supply to drive the fourth switching element. The third diode has an anode connected to the positive-side terminal of the element driving power supply. The third element driving unit is connected between a cathode of the third diode and a common connection node of the third and fourth switching elements to drive the third switching element. The third capacitor is connected to the third element driving unit in parallel. The second diode has an anode connected to the cathode of the third diode. The second element driving unit is connected between a cathode of the second diode and a common connection node of the second and third switching elements to drive the second switching element. The second capacitor is connected to the second element driving unit in parallel. The first diode has an anode connected to a cathode of the second diode. The first element driving unit is connected between a cathode of the first diode and a common connection node of the first and second switching elements to drive the first switching element. The first capacitor is connected to the first element driving unit in parallel. Citation List Patent Literature Patent Literature 1: JP 2018-133876 A Summary of Invention In a multi-level inverter including a three-level neutral point clamping inverter and switching element driver circuit as disclosed in Patent Literature 1, the switching loss caused by each of the first, second, and third switching elements increases in some cases. An object of the present disclosure is to provide a multi-level inverter which may cut down the switching loss. A multi-level inverter according to an aspect of the present disclosure includes a DC power supply unit, an inverter circuit, and a controller. The DC power supply unit includes a positive electrode, a negative electrode, and an intermediate potential node. The inverter circuit is connected between the positive electrode and the negative electrode of the DC power supply unit. The controller controls the inverter circuit. The inverter circuit includes a switching circuit, a first clamping diode, and a second clamping diode. The switching circuit includes a first switching element, a second switching element, a third switching element, and a fourth switching element. In the switching circuit, the first switching element, the second switching element, the third switching element, and the fourth switching element are connected in series to be arranged in this order from the positive electrode toward the negative electrode. The first clamping diode is connected between a first connection node of the first switching element and the second switching element and the intermediate potential node. The second clamping diode is connected between a second connection node of the third switching element and the fourth switching element and the intermediate potential node. The controller includes a first gate driver, a second gate driver, a third gate driver, a fourth gate driver, a first bootstrap circuit, a second bootstrap circuit, a third bootstrap circuit, a power supply unit, and a control unit. The first gate driver drives the first switching element. The second gate driver drives the second switching element. The third gate driver drives the third switching element. The fourth gate driver drives the fourth switching element. The first bootstrap circuit includes a first capacitor connected to the first gate driver in parallel and a first diode connected to the first capacitor in series. The second bootstrap circuit includes a second capacitor connected to the second gate driver in parallel and a second diode connected to the second capacitor in series. The third bootstrap circuit includes a third capacitor connected to the third gate driver in parallel and a third diode connected to the third capacitor in series. The power supply unit is connected to the fourth gate driver in parallel. The control unit c