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EP-4738712-A1 - SIMPLIFIED EFFICIENT ERROR CORRECTION CODE SCHEMES USING MULTIPLE CODEWORDS

EP4738712A1EP 4738712 A1EP4738712 A1EP 4738712A1EP-4738712-A1

Abstract

Implementations for simplified and efficient error correction code schemes with multiple codewords are provided. One aspect includes a computing system comprising: processing circuitry and memory storing instructions that, during execution, causes the processing circuitry to: encode data comprising user data and metadata in a memory module comprising a plurality of dies by: logically partitioning the memory module into a plurality of partitions; on a first partition: storing a first portion of the user data on one or more memory segments of the first partition; and storing a first cyclic redundancy check (CRC) codeword and the metadata on a memory segment of the first partition different from the one or more memory segments of the first partition, wherein the first CRC codeword is generated based on the first portion of the user data and the metadata; and storing parity data on one of the plurality of dies.

Inventors

  • DODDS, Brett Kenneth
  • GRUNZKE, TERRY M
  • NEMATI, MAJID ANARAKI

Assignees

  • Microsoft Technology Licensing, LLC

Dates

Publication Date
20260506
Application Date
20251024

Claims (15)

  1. A computing system for implementing an asymmetric error correction code scheme with multiple codewords, the computing system comprising: processing circuitry (102) and memory (104) storing instructions that, during execution, causes the processing circuitry to: encode data comprising user data (202, 306; 307) and metadata (204, 308; 310) in a memory module (106, 200, 300, 400, 500, 600) comprising a plurality of dies by: logically partitioning the memory module into a plurality of partitions, wherein each partition comprises a plurality of memory segments that includes a memory segment from each of the plurality of dies; on a first partition of the plurality of partitions: storing a first portion of the user data (202, 306) on one or more memory segments of the first partition; and storing a first cyclic redundancy check, CRC, codeword and the metadata on a memory segment of the first partition different from the one or more memory segments of the first partition, wherein the first CRC codeword is generated based on the first portion of the user data and the metadata; and storing parity data on one of the plurality of dies.
  2. The computing system of claim 1, wherein encoding the data further comprises: on a second partition of the plurality of partitions: storing a second portion of the user data (307) on one or more memory segments of the second partition; calculating a second CRC codeword based on the first portion of the user data and the second portion of the user data, wherein the second CRC codeword is longer than the first CRC codeword; and storing, on a memory segment of the second partition different from the one or more memory segments of the second partition, an exclusive-or, XOR, result comparing the second CRC codeword against the first CRC codeword and the metadata.
  3. The computing system of claim 2, wherein encoding the data further comprises: on a third partition of the plurality of partitions: storing a third portion of the user data on one or more memory segments of the third partition; calculating a third CRC codeword based on the first portion of the user data and the third portion of the user data, wherein the third CRC codeword is longer than the first CRC codeword; and storing, on a memory segment of the third partition different from the one or more memory segments of the third partition, an XOR result comparing the third CRC codeword against the first CRC codeword and the metadata.
  4. The computing system of claim 2 or claim 3, wherein the second CRC codeword is calculated based on an XOR result comparing the first portion of the user data against the second portion of the user data.
  5. The computing system of any one of claims 2 to 4, wherein the first CRC codeword, the metadata, and the XOR result comparing the second CRC codeword against the first CRC codeword and the metadata are stored on a same die of the plurality of dies.
  6. The computing system of any one of claims 2 to 5, wherein a length of the second CRC codeword is equal to a combined length of the first CRC codeword and the metadata.
  7. The computing system of any one of the preceding claims, wherein the plurality of dies comprises ten dies, and wherein the user data is stored on eight of the ten dies.
  8. The computing system of any one of the preceding claims, wherein the plurality of partitions comprises at least four partitions.
  9. The computing system of any one of the preceding claims, wherein the parity data is generated by performing an XOR operation comparing the plurality of dies excluding the die on which the parity data is to be stored.
  10. Enacted on a computing system, a method for implementing an asymmetric error correction code scheme with multiple codewords, the method comprising: encoding data comprising user data and metadata in a memory module comprising a plurality of dies by: logically partitioning the memory module into a plurality of partitions, wherein each partition comprises a plurality of memory segments that includes a memory segment from each of the plurality of dies (802); on a first partition of the plurality of partitions: storing a first portion of the user data on one or more memory segments of the first partition (704, 804); and storing a first cyclic redundancy check, CRC, codeword and the metadata on a memory segment of the first partition different from the one or more memory segments of the first partition, wherein the first CRC codeword is generated based on the first portion of the user data and the metadata (806); and storing parity data on one of the plurality of dies (708, 814).
  11. The method of claim 10, wherein encoding the data further comprises: on a second partition of the plurality of partitions: storing a second portion of the user data on one or more memory segments of the second partition (808); calculating a second CRC codeword based on the first portion of the user data and the second portion of the user data, wherein the second CRC codeword is longer than the first CRC codeword (810); and storing, on a memory segment of the second partition different from the one or more memory segments of the second partition, an exclusive-or, XOR, result comparing the second CRC codeword against the first CRC codeword and the metadata (812).
  12. The method of claim 11, wherein encoding the data further comprises: on a third partition of the plurality of partitions: storing a third portion of the user data on one or more memory segments of the third partition; calculating a third CRC codeword based on the first portion of the user data and the third portion of the user data, wherein the third CRC codeword is longer than the first CRC codeword; and storing, on a memory segment of the third partition different from the one or more memory segments of the third partition, an XOR result comparing the third CRC codeword against the first CRC codeword and the metadata.
  13. The method of claim 11 or claim 12, wherein the second CRC codeword is calculated based on an XOR result comparing the first portion of the user data against the second portion of the user data.
  14. The method of any one of claims 11 to 13, wherein the first CRC codeword, the metadata, and the XOR result comparing the second CRC codeword against the first CRC codeword and the metadata are stored on a same die of the plurality of dies.
  15. Enacted on a computing system, a method for implementing an error correction code scheme with multiple codewords, the method comprising: encoding data comprising user data in a memory module comprising a plurality of dies by: logically partitioning the memory module into a plurality of partitions, wherein each partition comprises a plurality of memory segments that includes a memory segment from each of the plurality of dies (702); for each of the plurality of partitions: storing a portion of the user data on one or more memory segments of the partition (704, 804); and storing a cyclic redundancy check, CRC, codeword on a memory segment of the partition different from the one or more memory segments of the partition, wherein the CRC codeword is generated based on the portion of the user data (706); and storing parity data on one of the plurality of dies (708, 814).

Description

BACKGROUND Error correction code (ECC) schemes refer to coding techniques for detecting and/or fixing errors in data storage and transmission, which can prevent system crashes and/or data loss. Such schemes may be crucial in various applications where data integrity is important, such as data server environments. Generally, data is encoded in a redundant way to provide error detection and/or correction. Depending on the degree of redundancy, the ECC scheme implemented may be able to detect and correct data corruption of varying degrees. One example of an ECC scheme includes the use of a cyclic redundancy check (CRC). CRC can be implemented by appending a fixed-length check value to a block of data, forming a "codeword" to be stored or transmitted, for example. The check value is a redundancy that utilizes cyclic codes to verify whether the data is corrupted. When the encoded data is read or received, the system may compare the check value to a value freshly calculated from the block of data. Mismatches indicate a data error, and the device may take corrective action, such as direct correction if ECC has such capability or rereading the encoded data or requesting another transmission. Matching values may be assumed to be error-free. However, there are possibilities of undetected errors, which can depend on the CRC scheme implemented and the block of data being encoded. SUMMARY Implementations for simplified efficient error correction code schemes with multiple codewords are provided. One aspect includes a computing system comprising: processing circuitry and memory storing instructions that, during execution, causes the processing circuitry to: encode data comprising user data and metadata in a memory module comprising a plurality of dies by: logically partitioning the memory module into a plurality of partitions, wherein each partition comprises a plurality of memory segments that includes a memory segment from each of the plurality of dies; on a first partition of the plurality of partitions: storing a first portion of the user data on one or more memory segments of the first partition; and storing a first cyclic redundancy check (CRC) codeword and the metadata on a memory segment of the first partition different from the one or more memory segments of the first partition, wherein the first CRC codeword is generated based on the first portion of the user data and the metadata; and storing parity data on one of the plurality of dies. This Summary is provided to introduce a selection of concepts in a simplified form that are further described below in the Detailed Description. This Summary is not intended to identify key features or essential features of the claimed subject matter, nor is it intended to be used to limit the scope of the claimed subject matter. Furthermore, the claimed subject matter is not limited to implementations that solve any or all disadvantages noted in any part of this disclosure. BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 shows a schematic view of an example computing system for implementing a simplified and efficient error correction code scheme with multiple codewords.FIG. 2 shows a schematic view of a memory module implementing an error correction code scheme with a single codeword.FIG. 3 shows a schematic view of an example memory module implementing a simplified and efficient error correction code scheme with two codewords, which can be implemented in the example computing system of FIG. 1.FIG. 4 shows a schematic view of an example memory module implementing a simplified and efficient error correction code scheme with four codewords, which can be implemented in the example computing system of FIG. 1.FIG. 5 shows a schematic view of an example memory module implementing an asymmetric error correction code scheme with four codewords, which can be implemented in the example computing system of FIG. 1.FIG. 6 shows a schematic view of an example memory module implementing a modified asymmetric error correction code scheme with four codewords, which can be implemented in the example computing system of FIG. 1.FIG. 7 shows a flow diagram of an example method for implementing a simplified and efficient error correction code scheme with multiple codewords, which can be implemented in the example computing system of FIG. 1.FIG. 8 shows a flow diagram of an example method for implementing a modified asymmetric error correction code scheme with multiple codewords, which can be implemented in the example computing system of FIG. 1.FIG. 9 shows a schematic view of an example computing environment in which the computer system of FIG. 1 may be enacted. DETAILED DESCRIPTION Error correction code (ECC) schemes can be implemented in various ways. One technique includes implementing an on-die ECC scheme, which provides error detection and/or correction on the memory module itself. Additionally or alternatively, an external ECC scheme can be implemented. Different ECC schemes can be implemented depe