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EP-4739025-A1 - MEMORY DEVICE WITH TUNEABLE THRESHOLD VOLTAGE

EP4739025A1EP 4739025 A1EP4739025 A1EP 4739025A1EP-4739025-A1

Abstract

A device (1) comprising: a first electrode (4) comprising a first electrode material of a type that, if oxidized by an oxidizing agent, is electrically insulating, a second electrode (2) comprising a second electrode material of a type that, if oxidized by said oxidizing agent, is electrically conducting, and a threshold switch layer (3) between the first electrode (4) and the second electrode (2), the threshold switch layer (3) comprising a material being switchable from an electrically insulating state to an electrically conducting state by a voltage between the first (4) and second electrode (2) crossing a threshold voltage, and a first electrode interface (40) between the threshold switch layer (3) and the first electrode (4), and a second electrode interface (20) between the threshold switch layer (3) and the second electrode (2), wherein the device (1) comprises the oxidizing agent suitable for being moveable between the first electrode (4) and the second electrode (2), the threshold switch layer (3) providing a passage for moving the oxidizing agent between the first electrode (4) and the second electrode (2).

Inventors

  • GARBIN, DANIELE
  • RAVSHER, Taras

Assignees

  • IMEC vzw
  • Katholieke Universiteit Leuven KU Leuven Research & Development

Dates

Publication Date
20260506
Application Date
20241112

Claims (15)

  1. A device (1) comprising: a first electrode (4) comprising a first electrode material of a type that, if oxidized by an oxidizing agent, is electrically insulating, a second electrode (2) comprising a second electrode material of a type that, if oxidized by said oxidizing agent, is electrically conducting, and a threshold switch layer (3) between the first electrode (4) and the second electrode (2), the threshold switch layer (3) comprising a material being switchable from an electrically insulating state to an electrically conducting state by a voltage between the first (4) and second electrode (2) crossing a threshold voltage (V thres ), and a first electrode interface (40) between the threshold switch layer (3) and the first electrode (4), and a second electrode interface (20) between the threshold switch layer (3) and the second electrode (2), wherein the device (1) comprises the oxidizing agent suitable for being moveable between the first electrode (4) and the second electrode (2), the threshold switch layer (3) providing a passage for moving the oxidizing agent between the first electrode (4) and the second electrode (2).
  2. The device (1) of claim 1, wherein the threshold switch layer (3) is a chalcogenide layer.
  3. The device (1) of claim 1 or 2, wherein, within the threshold switch layer (3), a concentration of a chemical element, from group 15 or group 16, and from period 3 or higher, is higher in a first region (32) contacting an electrode interface (20, 40) amongst the first and second electrode interface comprising the oxidizing agent than in a second region (31) separated from said electrode interface (20, 40) comprising the oxidizing agent by said first region (32).
  4. The device (1) of any of the previous claims, wherein the oxidizing agent comprises oxygen, sulphur, selenium or tellurium, preferably oxygen.
  5. The device (1) of any of the previous claims, wherein the threshold switch layer (3) comprises a catalyst for facilitating dissociation of the oxidizing agent from the electrode interfaces, said catalyst having a charge of a first sign, opposite to a second sign of a charge of the oxidizing agent.
  6. The device (1) of any of the previous claims, wherein the first electrode interface (40) comprises said first electrode material oxidized by the oxidizing agent, and/or the second electrode interface (20) comprises said second electrode material oxidized by the oxidizing agent.
  7. The device (1) of any of the previous claims, wherein the first electrode material comprises molybdenum, tantalum, titanium or titanium nitride.
  8. The device (1) of any of the previous claims, wherein the second electrode material comprises indium-tin-oxide, ruthenium, or tungsten.
  9. A memory element (7) comprising the device (1) of any of the previous claims.
  10. A method for programming data into the memory element (7) of claim 9, comprising applying a programming voltage to the memory element (7) for: inducing a movement of said oxidizing agent between the first electrode (4) and the second electrode (2) so as to change an amount of oxidized first material at the first electrode interface (40) and/or an amount of oxidized second electrode material at the second electrode interface (20), thereby tuning the threshold voltage (V thres ).
  11. The method of claim 10, wherein said programming voltage is applied so as to tune said threshold voltage by at least 0.1 V, preferably by at least 0.3 V, more preferably by at least 0.5 V, even more preferably by at least 1.0 V.
  12. The method of claim 10 or 11, wherein the programming voltage is applied for setting the threshold switch layer (3) from the electrically insulating state into the electrically conducting state.
  13. A method for reading data from the memory element (7) of claim 9, comprising applying a read voltage to the memory element (7) for determining a value representative of the threshold voltage (V thres ).
  14. The method of claim 13, wherein said value representative of the threshold voltage (V thres ) is a binary value that is dependent on the threshold voltage (V thres ) being below or above said read voltage.
  15. A memory apparatus (6) comprising: the memory element (7) of claim 9, and a controller configured for: executing - if instructed to program data into the memory element (7) - the method of any of claims 10 to 12 on the memory element (7), and executing - if instructed to read data from the memory element (7) - the method of claim 13 or 14 on the memory element (7).

Description

Technical field of the invention The present invention relates to the field of memory technology, and more specifically to storage-class memory devices utilizing chalcogenide materials. Background of the invention Memory technology plays a critical role in the performance and efficiency of modern computing systems. As applications become increasingly data-intensive and demand rapid processing of large datasets, the requirements for memory solutions have become more stringent. Modern computer architectures utilize a hierarchical memory structure that combines different types of memory technologies to optimize performance and storage capacity. Dynamic random-access memory (DRAM) serves as the primary working memory due to its fast access times of approximately 10 nanoseconds, enabling quick data retrieval and processing. In contrast, NAND Flash memory provides non-volatile storage with larger capacities but slower access times of around 100 microseconds. Despite significant advancements over the years, a considerable performance gap persists between volatile memory like DRAM and non-volatile storage solutions such as NAND Flash. This disparity poses challenges in achieving seamless system performance, as the slower access times of non-volatile memory can become a bottleneck for data-intensive applications requiring both speed and persistence. The need to bridge this gap has spurred interest in developing new memory technologies that can offer the high speed of DRAM while providing the non-volatility and cost benefits of NAND Flash. Storage-Class Memory (SCM) emerges as a promising category of memory technology aimed at filling this niche. SCM seeks to deliver a balance of performance, capacity, and endurance, effectively integrating into the existing memory hierarchy between DRAM and traditional storage solutions. Several approaches are being explored to realize SCM, including the integration of novel materials and device architectures that can support faster access times and higher data densities. At the moment, one of the promising candidates for this role is Phase-Change Memory (PCM) integrated in a cross-point array (which decreases costs by minimizing the area footprint of a single memory cell). However, for such an array to function properly, a highly non-linear selector element in series with PCM memory element (so-called 1S1R cell), which can suppress the unavoidable leakage current through half-selected cells, is required. For this purpose, ovonic threshold switches (OTS) have been used. As illustrated in FIG. 9, a current-voltage diagram of a typical ovonic threshold switch (OTS) comprising a chalcogenide layer material is shown. The diagram demonstrates the highly nonlinear switching behavior of the OTS, where the current through the device abruptly increases when the applied voltage exceeds a certain threshold voltage (Vthres). When, subsequently, the applied voltage drops below a certain hold voltage (Vhold), the current through the device abruptly decreases. This nonlinear characteristic allows the OTS to act as a selector device in series with a memory element, suppressing leakage current through unselected cells in a cross-point memory array. Typically, the role of a selector is played by a chalcogenide-based ovonic threshold switch (OTS) device. However, the development of this type of memory systems faces several challenges. One of the main problems of conventional 1S1R memory (containing an OTS layer stacked on a PCM layer) is related to the high aspect ratio of the memory cell. In particular, the PCM layer is typically much thicker than the OTS layer. High aspect ratio structures within these cells can complicate the manufacturing process, making precise patterning difficult and driving up fabrication costs. Indeed, the discrepancy in layer thicknesses in some memory cell designs contributes to these manufacturing complexities. Advancements in materials science and fabrication techniques continue to address some of these challenges, but obstacles remain in achieving the optimal balance of performance, scalability, and cost-effectiveness. Consequently, there is still a need for further developments in memory technology to overcome these limitations and fully realize the potential of advanced memory solutions like SCM. Summary of the invention It is an object of embodiments of the present invention to provide a good device, a good memory element comprising the device, a good memory apparatus comprising the memory element, and good programming and reading methods that may be applied on the memory elements. The above objective is accomplished by devices and methods according to the present invention. It is an advantage of embodiments of the present invention that a device having a tuneable threshold voltage may be provided, which may enable on-line tuning of the threshold voltage. It is an advantage of embodiments of the present invention that the need for a thick phase-change memory layer may