EP-4739052-A1 - DISPLAY DEVICE AND ELECTRONIC DEVICE
Abstract
A display device includes: a substrate; a circuit layer disposed on the substrate; a first electrode disposed on the circuit layer; a pixel defining layer disposed on a portion of the circuit layer and the first electrode, wherein an opening is defined in the pixel defining layer; a first light-emitting layer disposed on the first electrode and a portion of the pixel defining layer, wherein at least a portion of the first light-emitting layer overlaps the opening in a plan view; a protective layer disposed on the first light-emitting layer and overlapping the pixel defining layer in the plan view; a capping layer covering a side portion of the first light-emitting layer; and a second electrode disposed on the first light-emitting layer and the capping layer. The protective layer includes a first protective layer disposed on the first light-emitting layer and a second protective layer disposed on the first protective layer and having greater etch resistance than the capping layer.
Inventors
- MOON, YOUNGMIN
- CHOI, DAEWON
- KIM, ARONG
- Park, Jonghee
- PARK, HEEMIN
- YANG, SUKYOUNG
- YANG, HEEJUN
- LEE, Samin
- Cho, Wonje
- CHA, GWANGMIN
Assignees
- Samsung Display Co., Ltd.
Dates
- Publication Date
- 20260506
- Application Date
- 20250911
Claims (15)
- A display device (DD) comprising: a substrate (SS); a circuit layer (CL) disposed on the substrate (SS); a first electrode (EL1) disposed on the circuit layer (CL); a pixel defining layer (PDL) disposed on a portion of the circuit layer (CL) and the first electrode (EL1), wherein an opening (OP) is defined in the pixel defining layer (PDL); a first light-emitting layer (EML1) disposed on the first electrode (EL1) and a portion of the pixel defining layer (PDL), wherein at least a portion of the first light-emitting layer (EML1) overlaps the opening (OP) in a plan view; a protective layer (PL) disposed on the first light-emitting layer (EML1) and overlapping the pixel defining layer (PDL) in the plan view; a capping layer (CPL) covering a side portion of the first light-emitting layer (EML1); and a second electrode (EL2) disposed on the first light-emitting layer (EML1) and the capping layer (CPL), wherein the protective layer (PL) comprises: a first protective layer (PL1) disposed on the first light-emitting layer (EML1); and a second protective layer (PL2) disposed on the first protective layer (PL1) and having greater etch resistance than the capping layer (CPL).
- The display device (DD) of claim 1, wherein one side (P1-E) of the first protective layer (PL1), which is relatively distal from the opening (OP), and one side (P2-E) of the second protective layer (PL2), which is relatively distal from the opening (OP), protrude farther away from the opening (OP) than one side (E1-E) of the first light-emitting layer (EML1), which is relatively distal from the opening (OP), does.
- The display device (DD) of claim 2, wherein a portion of the capping layer (CPL) is disposed beneath a protruded side portion of the first protective layer (PL1), and wherein the portion of the capping layer (CPL) is in direct contact with the first light-emitting layer (EML1).
- The display device (DD) of any one of claims 1 to 3, wherein the second protective layer (PL2') has a smaller width than the first protective layer (PL1').
- The display device (DD) of any one of claims 1 to 4, wherein the capping layer (CPL) is in contact with an upper surface (PDL-UP) of the pixel defining layer (PDL) and an upper surface (PL2-UP) of the second protective layer (PL2).
- The display device (DD) of any one of claims 1 to 5, wherein a lower surface (EL2-LP) of the second electrode (EL2) is in direct contact with the first protective layer (PL1), the second protective layer (PL2), and the capping layer (CPL).
- The display device (DD) of any one of claims 1 to 6, further comprising a second light-emitting layer (EML2) spaced apart from the first light-emitting layer (EML1) and disposed on another portion of the pixel defining layer (PDL), wherein a side surface (E1-E) of the first light-emitting layer (EML1) and a side surface (E2-E) of the second light-emitting layer (EML2) overlap the pixel defining layer (PDL) in the plan view, and wherein the capping layer (CPL) covers the side surface (E1-E) of the first light-emitting layer (EML1) and the side surface (E2-E) of the second light-emitting layer (EML2).
- The display device (DD) of any one of claims 1 to 6, further comprising a second light-emitting layer (EML2) spaced apart from the first light-emitting layer (EML1) and disposed on another portion of the pixel defining layer (PDL), wherein the protective layer (PL) comprises: a third protective layer (PL3) disposed on the second light-emitting layer (EML2); and a fourth protective layer (PL4) disposed on the third protective layer (PL3) and having greater etch resistance than the capping layer (CPL), wherein a side surface (E1-E) of the first light-emitting layer (EML1), a side surface (E2-E) of the second light-emitting layer (EML2), a side surface (P1-E) of the first protective layer (PL1), a side surface (P2-E) of the second protective layer (PL2), a side surface (P3-E) of the third protective layer (PL3), and a side surface (P4-E) of the fourth protective layer (PL4) overlap the pixel defining layer (PDL) in the plan view, and wherein the capping layer (CPL) covers the side surface (E1-E) of the first light-emitting layer (EML1), the side surface (E2-E) of the second light-emitting layer (EML2), the side surface (P1-E) of the first protective layer (PL1), the side surface (PE-2) of the second protective layer (PL2), the side surface (PE-3) of the third protective layer (PL3), and the side surface (P4-E) of the fourth protective layer (PL4).
- The display device (DD) of any one of claims 1 to 8, wherein the first protective layer (PL1) comprises an inorganic material.
- The display device (DD) of claim 9, wherein the inorganic material comprises at least one selected from silicon nitride (SiNx), silicon oxynitride (SiOxNy), and silicon oxide (SiOx).
- The display device (DD) of any one of claims 1 to 10, wherein the second protective layer (PL2) comprises a metal oxide.
- The display device (DD) of claim 11, wherein the metal oxide comprises at least one selected from indium tin oxide (ITO), indium zinc oxide (IZO), indium gallium zinc oxide (IGZO), indium tin gallium oxide (ITGO), or indium tin gallium zinc oxide (ITGZO).
- The display device (DD) of any one of claims 1 to 12, wherein the capping layer (CPL) is defined by a single inorganic layer.
- The display device (DD) of any one of claims 1 to 13, wherein the capping layer (CPL) and the pixel defining layer (PDL) each comprise an inorganic material, and wherein the capping layer (CPL) and the pixel defining layer (PDL) are in contact with each other.
- The display device (DD1) of any one of claims 1 to 14, further comprising a transparent electrode layer (TCO) disposed on the second electrode (EL2).
Description
BACKGROUND 1. Field The present disclosure relates to a display device, an electronic device, and a method for manufacturing a display device. More specifically, the disclosure pertains to a display device that is structured to prevent damage to the light-emitting layer and disconnection of electrodes, employs a process advantageous for scalability, enhances device reliability, and is suitable for large-scale display devices, as well as an electronic device employing such a display device and a method for manufacturing such a display device. 2. Description of the Related Art In general, display devices are manufactured through multiple stages of processing, and masks may be used in a plurality of stages to form thin-film patterns. When forming the thin-film patterns, a display device may be manufactured using internal components as masks instead of using external masks to provide advantages for scalability. Accordingly, methods have been studied to pattern certain components of display devices, particularly light-emitting layers, using internal components of the display device as masks rather than using external masks. SUMMARY An embodiment of the present disclosure is to provide a display device with enhanced reliability and scalability. Another embodiment of the present disclosure is to provide an electronic device with enhanced reliability and scalability. Yet another embodiment of the present disclosure is to provide a method for manufacturing a display device with enhanced reliability and scalability. A display device according to an embodiment of the present disclosure includes a substrate, a circuit layer, a first electrode, a pixel defining layer, a first light-emitting layer, a protective layer, a capping layer, and a second electrode. In an embodiment, the circuit layer is disposed on the substrate. In an embodiment, the first electrode is disposed on the circuit layer. In an embodiment, the pixel defining layer is disposed on the circuit layer and the first electrode, and an opening is defined in the pixel defining layer. In an embodiment, the first light-emitting layer is disposed on the first electrode and a portion of the pixel defining layer, and at least a portion of the first light-emitting layer overlaps the opening in a plan view. In an embodiment, the protective layer is disposed on the first light-emitting layer and overlap the pixel defining layer. In an embodiment, the capping layer covers a side portion of the first light-emitting layer. In an embodiment, the second electrode is disposed on the first light-emitting layer and the capping layer. In an embodiment, the protective layer includes a first protective layer disposed on the first light-emitting layer and a second protective layer disposed on the first protective layer and having greater etch resistance than the capping layer. In an embodiment, one side of the first protective layer, which is farther from the opening, and one side of the second protective layer, which is farther from the opening may protrude farther away from the opening than one side of the first light-emitting layer, which is farther from the opening, does. In an embodiment, a portion of the capping layer may be disposed beneath a protruded side portion of the first protective layer. In an embodiment, the portion of the capping layer may be in direct contact with the first light-emitting layer. In an embodiment, the second protective layer may have a smaller width than the first protective layer. In an embodiment, the capping layer may contact an upper surface of the pixel defining layer and an upper surface of the second protective layer. In an embodiment, a lower surface of the second electrode may be in direct contact with the first protective layer, the second protective layer, and the capping layer. In an embodiment, the display device may further include a second light-emitting layer spaced apart from the first light-emitting layer and disposed on another portion of the pixel defining layer. In an embodiment, a side surface of the first light-emitting layer and a side surface of the second light-emitting layer may overlap the pixel defining layer in the plan view. In an embodiment, the capping layer may cover the side surface of the first light-emitting layer and the side surface of the second light-emitting layer. In an embodiment, the protective layer may further include a third protective layer disposed on the second light-emitting layer and a fourth protective layer disposed on the third protective layer and having greater etch resistance than the capping layer. In an embodiment, the side surface of the first light-emitting layer, the side surface of the second light-emitting layer, a side surface of the first protective layer, a side surface of the second protective layer, a side surface of the third protective layer, and a side surface of the fourth protective layer may overlap the pixel defining layer in the plan view. In an embodiment, the cappi