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EP-4739071-A1 - SUBSTRATE AND MANUFACTURING METHOD FOR THE SAME

EP4739071A1EP 4739071 A1EP4739071 A1EP 4739071A1EP-4739071-A1

Abstract

A substrate according to the present disclosure comprises a glass core having an upper surface. A maximum height roughness (Rmax) value of the upper surface of the glass core is 3 nm to 7 nm. A surface energy of the upper surface of the glass core is 50 mN/m to 63 mN/m. In such a case, an insulating layer having improved peel resistance may be implemented on the glass core, and electrical reliability of the substrate may be further improved.

Inventors

  • KIM, SUNGJIN
  • KIM, JINCHEOL

Assignees

  • Absolics Inc.

Dates

Publication Date
20260506
Application Date
20251020

Claims (18)

  1. The substrate comprising: a glass core having an upper surface, wherein a maximum height roughness (Rmax) value of the upper surface of the glass core is 3 nm to 7 nm, and a surface energy of the upper surface of the glass core is 50 mN/m to 63 mN/m.
  2. The substrate of claim 1, wherein a ratio of a contact angle of the upper surface of the glass core with respect to water to a contact angle of the upper surface of the glass core with respect to diiodomethane is 0.75 or greater.
  3. The substrate of claim 1, wherein a contact angle of the upper surface of the glass core with respect to water is 40° to 55°.
  4. The substrate of claim 1, wherein an arithmetic average roughness (Ra) value of the upper surface of the glass core is 0.3 nm to 0.5 nm.
  5. The substrate of claim 1, wherein a root-mean-square roughness (Rq) value of the upper surface of the glass core is 0.4 nm to 1 nm.
  6. The substrate of claim 1, further comprising an insulating layer disposed on the glass core, wherein the insulating layer comprises an epoxy-based resin.
  7. The substrate of claim 6, wherein a peel strength of the insulating layer with respect to the upper surface of the glass core, measured by a 90° peeling test, is 25 N/cm 2 or greater.
  8. The substrate of claim 6, wherein a shear strength of the insulating layer with respect to the upper surface of the glass core is 40 N/cm 2 or greater.
  9. The substrate of claim 1, wherein the substrate is for use in semiconductor packaging.
  10. The substrate of claim 1, further comprising a first redistribution layer disposed on the glass core, wherein the first redistribution layer comprises a conductive layer and an insulating layer surrounding at least a portion of the conductive layer, wherein the first redistribution layer has an upper surface, and a waviness of the upper surface of the first redistribution layer is 0.7 µm or less.
  11. The substrate of claim 10, wherein the conductive layer comprises a first conductive layer formed in contact with the upper surface of the glass core, and a ratio of an area of the upper surface of the glass core occupied by the first conductive layer to an entire area of the upper surface of the glass core is 80 % or less.
  12. The substrate of claim 11, wherein a thickness of the first conductive layer is 10 µm to 50 µm.
  13. The substrate of claim 10, wherein a modulus of elasticity of the insulating layer measured at 23 °C is 8 GPa or less.
  14. The substrate of claim 10, wherein a coefficient of thermal expansion of the insulating layer is 60 ppm/°C or less.
  15. The substrate of claim 10, wherein the insulating layer comprises a filler, and the insulating layer comprises 65 wt % or more of the filler.
  16. The substrate of claim 10, wherein a ratio of a thickness of the first redistribution layer to a thickness of the glass core is 0.1 to 1.
  17. A substrate comprising: a glass core; and a first redistribution layer disposed on the glass core, wherein the first redistribution layer comprises a conductive layer and an insulating layer surrounding at least a portion of the conductive layer, wherein the first redistribution layer has an upper surface, and a waviness of the upper surface of the first redistribution layer is 0.7 µm or less.
  18. A method of manufacturing a substrate, comprising: a preparation step of preparing a base glass plate; and a roughening step of forming a glass core by roughening an upper surface of the base glass plate, wherein the glass core has an upper surface, a maximum height roughness (Rmax) value of the upper surface of the glass core is 3 nm to 7 nm, and a surface energy of the upper surface of the glass core is 50 mN/m to 63 mN/m.

Description

TECHNICAL FIELD The present disclosure relates to a substrate and a manufacturing method for the same. BACKGROUND In manufacturing electronic components, implementing circuits on a semiconductor wafer is referred to as a front-end (FE) process, and assembling the wafer into a state usable in an actual product is referred to as a back-end (BE) process, and a packaging process is included in this back-end process. Among the four core technologies of the semiconductor industry that have enabled the rapid development of electronic products in recent years are semiconductor technology, semiconductor packaging technology, manufacturing process technology, and software technology. Semiconductor technology has developed in various forms such as a line width at micro or sub-nano levels, more than ten million cells, high-speed operation, and a large amount of heat dissipation; however, technology to perfectly package the same has not been sufficiently supported. Accordingly, the electrical performance of a semiconductor may be determined by packaging technology and the electrical connection according thereto rather than by the performance of the semiconductor technology itself. As materials for a packaging substrate, ceramic or resin is applied. In the case of a ceramic substrate, it is not easy to mount a high-performance, high-frequency semiconductor device due to a high resistance value or a high dielectric constant. In the case of a resin substrate, a high-performance, high-frequency semiconductor device can be relatively mounted; however, there is a limit to reduction of the wiring pitch. Recently, studies have been conducted in which silicon or glass is applied as a high-end packaging substrate. A through-hole is formed in a silicon or glass substrate, and a conductive material is applied to the through-hole, whereby the wiring length between a device and a motherboard can be shortened and excellent electrical characteristics can be obtained. SUMMARY According to one embodiment of the present specification, a substrate includes a glass core having an upper surface. A maximum height roughness (Rmax) value of the upper surface of the glass core is 3 nm to 7 nm. A surface energy of the upper surface of the glass core is 50 mN/m to 63 mN/m. A ratio of a contact angle of the upper surface of the glass core with respect to water to a contact angle of the upper surface of the glass core with respect to diiodomethane may be 0.75 or greater. A contact angle of the upper surface of the glass core with respect to water may be 40° to 55°. An arithmetic average roughness (Ra) value of the upper surface of the glass core may be 0.3 nm to 0.5 nm. A root-mean-square roughness (Rq) value of the upper surface of the glass core may be 0.4 nm to 1 nm. The substrate may further include an insulating layer disposed on the glass core. The insulating layer may include an epoxy-based resin. A peel strength of the insulating layer with respect to the upper surface of the glass core, measured by a 90° peeling test, may be 25 N/cm2 or greater. A shear strength of the insulating layer with respect to the upper surface of the glass core may be 40 N/cm2 or greater. The substrate may be for semiconductor packaging use. The substrate may include a first redistribution layer disposed on the glass core. The first redistribution layer may include a conductive layer and an insulating layer surrounding at least a portion of the conductive layer. The first redistribution layer may include an upper surface. A waviness of the upper surface of the first redistribution layer may be 0.7 µm or less. The conductive layer may include a first conductive layer formed in contact with the upper surface of the glass core. A ratio of an area of the upper surface of the glass core occupied by the first conductive layer to an entire area of the upper surface of the glass core may be 80% or less. A thickness of the first conductive layer may be 10 µm to 50 µm. A modulus of elasticity of the insulating layer measured at 23 °C may be 8 GPa or less. A coefficient of thermal expansion of the insulating layer may be 60 ppm/°C or less. The insulating layer may include a filler. The insulating layer may include 65 wt% or more of the filler. A thickness of the glass core may be 200 µm to 2,000 µm. A ratio of a thickness of the first redistribution layer to a thickness of the glass core may be 0.1 to 1. Another embodiment of the substrate according to the present specification includes a glass core and a first redistribution layer disposed on the glass core. The first redistribution layer includes a conductive layer and an insulating layer surrounding at least a portion of the conductive layer. The first redistribution layer includes an upper surface. A waviness of the upper surface of the first redistribution layer is 0.7 µm or less. The waviness of the upper surface of the first redistribution layer may be 0.3 µm or less. The glass core may include an upper surface. The co