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EP-4739073-A1 - PACKAGING SUBSTRATE AND SEMICONDUCTOR PACKAGE COMPRISING THE SAME

EP4739073A1EP 4739073 A1EP4739073 A1EP 4739073A1EP-4739073-A1

Abstract

A packaging substrate according to the present disclosure comprises a core layer and an insulating layer disposed on the core layer. The insulating layer comprises an insulating resin. The insulating layer comprises a first insulating layer and a second insulating layer disposed on the first insulating layer. A hydroxyl peak intensity of the second insulating layer measured by FT-IR is smaller than a hydroxyl peak intensity of the first insulating layer measured by FT-IR. A moisture absorption amount of the packaging substrate measured after being left to stand for 7 days under an atmosphere of 23 °C and 50 % RH is 500 ppm to 1200 ppm. In such a case, a packaging substrate and the like capable of stably maintaining long-term durability and electrical reliability may be provided.

Inventors

  • KIM, SUNGJIN
  • KIM, JINCHEOL

Assignees

  • Absolics Inc.

Dates

Publication Date
20260506
Application Date
20251023

Claims (8)

  1. A packaging substrate comprising: a core layer; and an insulating layer disposed on the core layer, wherein the insulating layer comprises an insulating resin, the insulating layer comprises a first insulating layer and a second insulating layer disposed on the first insulating layer, a hydroxyl peak intensity of the second insulating layer measured by FT-IR is smaller than a hydroxyl peak intensity of the first insulating layer measured by FT-IR, and a moisture absorption amount measured after being left to stand for 7 days under an atmosphere of 23 °C and 50 % RH is 500 ppm to 1200 ppm.
  2. The packaging substrate of claim 1, wherein a hydroxyl group reduction ratio (Rhd value) represented by the following Formula 1 is 30 % to 80 %: Rhd = H 1 − H 2 H 1 × 100 % in the Formula 1, wherein H 1 is a hydroxyl peak intensity of the first insulating layer measured by FT-IR, and H 2 is a hydroxyl peak intensity of the second insulating layer measured by FT-IR.
  3. The packaging substrate of claim 1, wherein a modulus of elasticity of the insulating layer measured at 23 °C is 4 GPa to 8 GPa.
  4. The packaging substrate of claim 1, wherein the insulating layer is disposed in contact with at least a portion of an upper surface of the core layer, and a peel strength of the insulating layer with respect to the upper surface of the core layer measured by a 90° peeling test is 25 N/cm 2 or more.
  5. The packaging substrate of claim 1, wherein the insulating layer is disposed in contact with at least a portion of an upper surface of the core layer, and a shear strength of the insulating layer with respect to the upper surface of the core layer is 40 N/cm 2 or more.
  6. The packaging substrate of claim 1, wherein the insulating resin comprises an epoxy-based resin.
  7. The packaging substrate of claim 1, wherein the core layer comprises a glass core or a ceramic core.
  8. A semiconductor package comprising: the packaging substrate of claim 1; and a device electrically connected to the packaging substrate.

Description

This application claims the priority benefit of US provisional Application No. 63/713,081 filed on October 29, 2024. TECHNICAL FIELD The present disclosure relates to a packaging substrate and a semiconductor package comprising the same. BACKGROUND In manufacturing an electronic component, a process of implementing a circuit on a semiconductor wafer is called a front-end process (FE: Front-End), and assembling the wafer into a state usable in an actual product is called a back-end process (BE: Back-End), which includes a packaging process. Among the four core technologies that have enabled rapid advancement of the semiconductor industry-which drives the development of electronic devices-are semiconductor technology, semiconductor packaging technology, manufacturing process technology, and software technology. Although semiconductor technology has advanced in various forms, such as linewidths in the submicron to nanometer range, integration of tens of millions of cells, high-speed operation, and high heat dissipation, the technology for perfectly packaging such semiconductors has not been sufficiently established. Accordingly, the electrical performance of a semiconductor may be determined not only by the semiconductor technology itself but also by the packaging technology and the electrical connection associated therewith. As materials for a packaging substrate, ceramics or resins are generally used. In the case of a ceramic substrate, due to its high resistance or high dielectric constant, it is difficult to mount a high-performance, high-frequency semiconductor device thereon. In the case of a resin substrate, although it is relatively capable of mounting a high-performance, high-frequency semiconductor device, there is a limitation in reducing wiring pitch. Recently, research has been conducted on applying silicon or glass as materials for high-end packaging substrates. By forming through holes in a silicon or glass substrate and applying a conductive material to the through holes, wiring length between a device and a motherboard can be shortened, thereby achieving excellent electrical characteristics. SUMMARY A packaging substrate according to one embodiment of the present disclosure comprises a core layer and an insulating layer disposed on the core layer. The insulating layer comprises an insulating resin. The insulating layer comprises a first insulating layer and a second insulating layer disposed on the first insulating layer. A hydroxyl peak intensity of the second insulating layer measured by FT-IR is smaller than a hydroxyl peak intensity of the first insulating layer measured by FT-IR. A moisture absorption amount of the packaging substrate measured after being left to stand for 7 days under an atmosphere of 23 °C and 50 % RH is 500 ppm to 1200 ppm. A hydroxyl group reduction ratio (Rhd value) of the packaging substrate represented by the following Formula 1 may be 30 % to 80 %. Rhd=H1−H2H1×100% In Formula 1, H1 is a hydroxyl peak intensity of the first insulating layer measured by FT-IR, and H2 is a hydroxyl peak intensity of the second insulating layer measured by FT-IR. A modulus of elasticity of the insulating layer measured at 23 °C may be 4 GPa to 8 GPa. The insulating layer may be disposed in contact with at least a portion of an upper surface of the core layer. A peel strength of the insulating layer with respect to the upper surface of the core layer measured by a 90° peeling test may be 25 N/cm2 or more. A shear strength of the insulating layer with respect to the upper surface of the core layer may be 40 N/cm2 or more. The insulating resin may comprise an epoxy-based resin. The core layer may comprise a glass core or a ceramic core. A semiconductor package according to another embodiment of the present disclosure comprises the packaging substrate and a device electrically connected to the packaging substrate. BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a cross-sectional view illustrating a packaging substrate according to one embodiment of the present disclosure.FIG. 2 is a cross-sectional view illustrating a packaging substrate according to another embodiment of the present disclosure. DETAILED DESCRIPTION Hereinafter, exemplary embodiments of the present disclosure will be described in detail with reference to the accompanying drawings so that those skilled in the art to which the present disclosure pertains can easily carry out the present disclosure. However, the present disclosure may be embodied in various different forms, and is not limited to the embodiments described herein. Throughout the entire specification, the same reference numerals are assigned to similar parts. Throughout the present specification, the term "combination thereof" included in Markush-type expressions means one or mixture or combination selected from a group consisting of components listed in the Markush-type expression, and refers to one or more selected from the group consisting of the components. In