Search

EP-4740106-A1 - ASSEMBLY FOR AN ELECTRONIC COMPUTING DEVICE, AND METHOD FOR OPERATING AN ASSEMBLY

EP4740106A1EP 4740106 A1EP4740106 A1EP 4740106A1EP-4740106-A1

Abstract

The invention relates to an assembly for an electronic computing device (10), comprising at least one microcontroller (12) and at least one I/O device (18, 20) communicating with the microcontroller (12), wherein an integrated circuit (14) is arranged between the microcontroller (12) and the I/O device (18, 20) and is designed to control the communication between the microcontroller (12) and the I/O device (18, 20). The invention also relates to a corresponding method for operating an assembly of this kind. The invention also relates to a method for operating an assembly (16).

Inventors

  • BARTHELMESS, BERND
  • Nickl, Felix
  • Witterauf, Michael

Assignees

  • Siemens Aktiengesellschaft

Dates

Publication Date
20260513
Application Date
20240809

Claims (15)

  1. 1. Arrangement (16) for an electronic computing device (10), with at least one microcontroller (12) and at least one input/output device (18, 20) which communicates with the microcontroller (12), characterized in that an integrated circuit (14) is arranged between the microcontroller (12) and the input/output device (18, 20), which is designed to control communication between the microcontroller (12) and the input/output device (18, 20).
  2. 2. Arrangement (16) according to claim 1, characterized in that the integrated circuit (14) is designed as a field-programmable gate array device.
  3. 3. Arrangement (16) according to claim 1 or 2, characterized in that the integrated circuit (14) carries out a partial reconfiguration of its own partition after connection of the at least one input/output device (18, 20).
  4. 4. Arrangement (16) according to one of the preceding claims, characterized in that a respective bitstream for a respective input/output device (18, 20) is provided for the integrated circuit (14).
  5. 5. Arrangement (16) according to claim 4, characterized in that the respective input/output device (18, 20) is provided with the respective bitstream.
  6. 6. Arrangement (16) according to one of claims 4 or 5, characterized in that the respective bit stream is stored within a memory device (22) of the integrated circuit (14).
  7. 7. Arrangement (16) according to claim 6, characterized in that the respective bitstream is provided in a flash memory as a storage device (22).
  8. 8. Arrangement (16) according to one of claims 4 to 7, characterized in that the bitstream for downloading from a network is provided by means of the integrated circuit (14).
  9. 9. Arrangement (16) according to one of the preceding claims, characterized in that the integrated circuit (16) is designed to convert raw data of the input/output device (18, 20) for the microcontroller (12).
  10. 10. Arrangement (16) according to one of the preceding claims, characterized in that the integrated circuit (14) has a pin arrangement (24) which is connected to all connectors of the integrated circuit (14).
  11. 11. Arrangement (16) according to one of the preceding claims, characterized in that the integrated circuit (14) has at least one further pin arrangement (30, 32), wherein the further pin arrangement (30, 32) is designed for connection to the at least one input/output device (18, 20).
  12. 12. Arrangement (16) according to claim 11, characterized in that the integrated circuit (14) has at least two further pin arrangements (30, 32), wherein the two further pin arrangements (30, 32) are formed homogeneously.
  13. 13. A method for operating an arrangement (16) according to one of claims 1 to 12, comprising the steps: - detecting a connection of at least one input/output device (18, 20) to the integrated circuit (14) by means of the integrated circuit (14); - identifying the respective input/output device (18, 20) by means of the integrated circuit (14); - receiving a bitstream for the respective input/output device (18, 20) by means of the integrated circuit (14), wherein in the event that no bitstream is received for the respective input/output device, an extension description is generated by the integrated circuit (14) and stored on the memory device (22); and - Partially reconfiguring a partition of the integrated circuit (14) depending on the respectively received bit stream by means of the integrated circuit (14).
  14. 14. The method according to claim 13, characterized in that raw data from the input/output device (18, 20) are converted by means of the integrated circuit (14) into data readable by the microcontroller (12), wherein a new connection of an input/output device (18, 20) to the integrated circuit (14) is communicated to the microcontroller (12) by means of the integrated circuit (14).
  15. 15. Method according to claim 13 or 14, characterized in that at least one extension description stored on the storage device (22) is read out by an external system and a new firmware and/or bitstream for the integrated circuit (14) is compiled using the extension description and then transferred to the integrated circuit (14).

Description

Description Arrangement for an electronic computing device, and method for operating an arrangement The invention relates to an arrangement for an electronic computing device, with at least one microcontroller and at least one input/output device which communicates with the microcontroller according to the applicable patent claim 1. Furthermore, the invention relates to a corresponding method for operating such an arrangement. System developers want to prototype gateway devices, particularly devices that improve the connectivity of other devices, for example by connecting sensors or actuators to a network, or separating north and south bound communication, or similar, as flexibly as possible. To achieve this, modularity can be offered at the PCB level. The user connects additional interface extension modules to previously defined connectors. This gives rise to the following problems: The interfaces require different processing of their data and control signals, and certain timing guarantees and restrictions are difficult to implement in software. A microcontroller that controls the gateway device usually offers only a limited, often small, number of interfaces with predefined types. Often these interfaces are already reserved for other necessary applications, such as connecting flash memories or permanently installed Ethernet controllers. In order to keep the possible configuration flexible - every extension module can be connected to every connector - it would have to be possible to route from every connector to every interface of the microcontroller. It is often the case that extension modules implement interfaces that have no equivalent on the microcontroller. The extension modules should be automatically recognized and configured in order to avoid sources of error and unnecessary work. In summary, a problem in the state of the art is that extension modules can be of as arbitrary a number, type and Configuration can be connected to the microcontroller and set up automatically. This modularity problem is usually solved at a higher level than the PCB level. For example, modules are connected that handle the processing of the raw signals themselves, perhaps through their own microcontroller, and forward them to the main device, in particular the electronic computing device, via a common interface, which are also often pre-processed before being forwarded to the microcontroller. Other solutions, however, are simply not as flexible and instead define in advance which signals are passed through a connector, for example SRI and I2C. This makes the development of extension modules that are not anticipated in advance more difficult, as they may have to include a conversion to the supported signals. The object of the present invention is to provide an arrangement and a method by means of which input/output devices can be connected to an electronic computing device in a simplified manner. This object is achieved by an arrangement and by a method according to the independent patent claims. Advantageous embodiments are specified in the subclaims. One aspect of the invention relates to an arrangement for an electronic computing device, with at least one microcontroller and at least one input/output device which communicates with the microcontroller. It is provided that an integrated circuit is arranged between the microcontroller and the input/output device, which is designed to control communication between the microcontroller and the input/output device. In particular, an integrated circuit is thus proposed as a modular input/output coprocessor. In particular, the input/output device is also referred to as an input/output device. In particular, the integrated circuit can be designed as a so-called embedded device. The integrated circuit as well as the microcontroller can be provided as part of the electronic computer device or as separate parts. In particular, the invention proposes that the integrated circuit acts as an I/O coprocessor and decouples the microcontroller from the expansion modules. The automatic setup can be achieved by a combination of identification data and partial reconfiguration. Partial reconfiguration is a capability of integrated circuits in which only parts, in particular so-called partitions, of the integrated circuit are reconfigured and thus new hardware functionality can be implemented. This is used here so that expansion modules can, for example, bring their own hardware implementations with them. In particular, the idea is that the user connects the expansion modules, which bring a so-called partial bitstream with which a pre-reserved partition of the integrated circuit is configured and thus the integrated circuit is partially reconfigured. The partial bitstream implements hardware functionality that takes over the decoding and encoding of the raw data and control signals for the expansion module. The actual communication with the microcontroller, the control of the reconfiguration