Search

EP-4740229-A1 - ELECTRONIC DEVICE WITH THREE-DIMENSIONAL ON-CHIP INDUCTORS

EP4740229A1EP 4740229 A1EP4740229 A1EP 4740229A1EP-4740229-A1

Abstract

An electronic device may include wireless circuitry. The wireless circuitry may include inductors. The inductors may include an on-chip three-dimensional (3D) inductor. The 3D inductor may include a stack of windings in different metallization layers of the substrate. The 3D inductor may include at least one additional winding formed from at least one of the same metallization layers as the stack of windings. The at least one additional winding may laterally surround at least one of the windings from the stack of windings. The stack of windings may be vertically aligned or staggered. The at least one additional winding may be arranged in a vertically aligned stack or a staggered stack. Two or more stacks of windings may be separated by a winding between the stacks. The inductor may occupy a minimal amount of area while minimizing fringing capacitance, thereby optimizing quality factor and self-resonance frequency.

Inventors

  • TSAI, MING-DA
  • JIANG, Haowei, J.

Assignees

  • Apple Inc.

Dates

Publication Date
20260513
Application Date
20240816

Claims (20)

  1. 1. An integrated circuit comprising: a semiconductor substrate having a first metallization layer, a second metallization layer, and a third metallization layer; and an inductor that includes a first winding formed from the first metallization layer, a second winding that is formed from the second metallization layer and that at least partially overlaps the first winding, a third winding that is formed from the third metallization layer and that at least partially overlaps the second winding, and a fourth winding that is formed from the third metallization layer and that laterally surrounds the third winding.
  2. 2. The integrated circuit of claim 1, wherein the inductor has a first terminal on the first winding, the inductor has a second terminal on the second winding, and the inductor is configured to pass current from the first terminal to the second winding through the first winding, from the first winding to the third winding through the second winding, and from the third winding to the second terminal through the fourth winding.
  3. 3. The integrated circuit of claim 2, wherein the first winding, the second winding, the third winding, and the fourth winding each wraps at least 300 degrees around a central axis of the inductor.
  4. 4. The integrated circuit of claim 1, wherein the inductor further comprises: a fifth winding that is formed from the second metallization layer, that is coupled to the fourth winding, and that laterally surrounds the second winding.
  5. 5. The integrated circuit of claim 4, wherein the fifth winding is laterally offset with respect to the fourth winding.
  6. 6. The integrated circuit of claim 5, wherein the inductor further comprises: a sixth winding that is formed from the first metallization layer, that is coupled to the fifth winding, that laterally surrounds the first winding, and that is laterally offset with respect to the fifth winding.
  7. 7. The integrated circuit of claim 6, wherein the first winding, the second winding, and the third winding are arranged in a vertically aligned stack.
  8. 8. The integrated circuit of claim 7, wherein the inductor further comprises: a seventh winding that is formed from the first metallization layer, that is coupled to the sixth winding, and that laterally surrounds the sixth winding; an eighth winding that is formed from the second metallization layer, that is coupled to the seventh winding, and that laterally surrounds the fifth winding; and an ninth winding that is formed from the third metallization layer, that is coupled to the eighth winding, and that laterally surrounds the fourth winding, wherein the seventh winding, the eighth winding, and the ninth winding are arranged in an additional vertically aligned stack.
  9. 9. The integrated circuit of claim 8, wherein the first winding is laterally separated from the sixth winding by a first distance, the ninth winding is laterally separated from the fourth winding by the first distance, the eighth winding is laterally separated from the fifth winding by a second distance shorter than the first distance, the fifth winding is laterally separated from the second winding by the second distance, the seventh winding is laterally separated from the sixth winding by a third distance less than the second distance, and the fourth winding is laterally separated from the third winding by the third distance.
  10. 10. The integrated circuit of claim 6, wherein the first winding is laterally offset with respect to the second winding and the second winding is laterally offset with respect to the third winding.
  11. 11. The integrated circuit of claim 10, wherein the inductor further comprises: a seventh winding that is formed from the first metallization layer, that is coupled to the sixth winding, and that laterally surrounds the sixth winding; an eighth winding that is formed from the second metallization layer, that is coupled to the seventh winding, that laterally surrounds the fifth winding, and that is laterally offset with respect to the seventh winding; and an ninth winding that is formed from the third metallization layer, that is coupled to the eighth winding, that laterally surrounds the fourth winding, and that is laterally offset with respect to the eighth winding.
  12. 12. The integrated circuit of claim 8, wherein the first winding is laterally separated from the sixth winding by a first distance, the ninth winding is laterally separated from the fourth winding by the first distance, the eighth winding is laterally separated from the fifth winding by a second distance shorter than the first distance, the fifth winding is laterally separated from the second winding by the second distance, the seventh winding is laterally separated from the sixth winding by a third distance less than the second distance, and the fourth winding is laterally separated from the third winding by the third distance.
  13. 13. The integrated circuit of claim 1, wherein the inductor further comprises: a fifth winding that is formed from the third metallization layer, that is coupled to the fourth winding, and that laterally surrounds the fourth winding; a sixth winding that is formed from the second metallization layer, that is coupled to the fifth winding, and that laterally surrounds the second winding, and that is laterally separated from the second winding; and a seventh winding that is formed from the first metallization layer, that is coupled to the sixth winding, and that laterally surrounds the first winding.
  14. 14. The integrated circuit of claim 13, wherein the first winding, the second winding, and the third winding are arranged in a first vertically aligned stack, and the fifth winding, the sixth winding, and the seventh winding are arranged in a second vertically aligned stack.
  15. 15. The integrated circuit of claim 1, wherein the inductor further comprises: a sixth winding that is formed from the second metallization layer, that is coupled to the fourth winding, and that laterally surrounds the second winding; and a seventh winding that is formed from the first metallization layer, that is coupled to the sixth winding and the third winding, and that laterally surrounds the first winding, wherein current is configured to flow from the first winding to the second winding, from the second winding to the third winding, from the third winding to the seventh winding, from the seventh winding to the sixth winding, and from the sixth winding to the fourth winding.
  16. 16. Wireless circuitry comprising: a substrate having a first metallization layer, a second metallization layer, and a third metallization layer; and an inductor embedded in the substrate, the inductor including a first winding in the first metallization layer, a second winding in the second metallization layer, a third winding in the third metallization layer, a fourth winding in the third metallization layer that extends around the third winding, a fifth winding in the second metallization layer that extends around the second winding, and a sixth winding in the first metallization layer that extends around the first winding, wherein the inductor is configured to pass current from the first winding to the second winding, from the second winding to the third winding, from the third winding to the fourth winding, from the fourth winding to the fifth winding, and from the fifth winding to the sixth winding.
  17. 17. The wireless circuitry of claim 16, wherein the fourth winding is laterally separated from the third winding by a first distance, the fifth winding is laterally separated from the second winding by a second distance greater than the first distance, the sixth winding is laterally separated from the first winding by a third distance greater than the second distance, the first winding, the second winding, and the third winding are arranged in a vertically aligned stack, and the fourth winding, the fifth winding, and the sixth winding are arranged in a staggered stack.
  18. 18. The wireless circuitry of claim 16, wherein the fourth winding is laterally separated from the third winding by a first distance, the fifth winding is laterally separated from the second winding by a second distance greater than the first distance, the sixth winding is laterally separated from the first winding by a third distance greater than the second distance, the first winding, the second winding, and the third winding are arranged in a first staggered stack, and the fourth winding, the fifth winding, and the sixth winding are arranged in a second staggered stack.
  19. 19. An electronic device comprising: a semiconductor substrate having a first metallization layer, a second metallization layer, and a third metallization layer; and an inductor embedded in the substrate, the inductor including a first winding in the first metallization layer, a second winding that is in the second metallization layer, that is coupled to the first winding, and that at least partially overlaps the first winding, a third winding that is in the third metallization layer, that is coupled to the second winding, and that at least partially overlaps the second winding, and a fourth winding that is in the first metallization layer and that extends around the first winding, the inductor being configured to pass current from the first winding to the second winding, from the second winding to the third winding, and from the third winding to the fourth winding.
  20. 20. The electronic device of claim 19, wherein the inductor further comprises: a fifth winding that is in the second metallization layer, that is coupled to the fourth winding, and that extends around the second winding, and a sixth winding that is in the third metallization layer, that is coupled to the fifth winding, and that extends around the third winding, the inductor being configured to pass current from the fourth winding to the fifth winding and from the fifth winding to the sixth winding.

Description

Electronic Device with Three-Dimensional On-Chip Inductors This application claims priority to U.S. Patent Application No. 18/470,581, filed September 20, 2023, which is hereby incorporated by reference herein in its entirety. Field [0001] This disclosure relates generally to electronic devices, including electronic devices with wireless communications circuitry. Background [0002] Electronic devices can be provided with wireless communications capabilities. An electronic device with wireless communications capabilities has wireless communications circuitry with one or more antennas that convey radio-frequency signals. [0003] The wireless communications circuitry may include inductors that are used in conveying the radio-frequency signals. It can be challenging to provide the inductors with sufficient levels of performance. In addition, if care is not taken, the inductors can consume an excessive amount of area in the device. Summary [0004] An electronic device may include wireless circuitry. The wireless circuitry may include inductors. The inductors may include on-chip inductors on a semiconductor substrate. The on-chip inductors may include a three-dimensional (3D) inductor. [0005] The 3D inductor may include a stack of windings in different metallization layers of the substrate. The 3D inductor may include at least one additional winding formed from at least one of the same metallization layers as the stack of windings. The at least one additional winding may laterally surround at least one of the windings from the stack of windings. The stack of windings may be vertically aligned or staggered. The at least one additional winding may be arranged in a vertically aligned stack or a staggered stack. Two or more stacks of windings may be separated by a winding between the stacks. The 3D inductor may occupy a minimal amount of area on the substrate while minimizing fringing capacitance, thereby optimizing the quality factor and self-resonance frequency of the inductor. [0006] An aspect of the disclosure provides an integrated circuit. The integrated circuit can include a semiconductor substrate having a first metallization layer, a second metallization layer, and a third metallization layer. The integrated circuit can include an inductor. The inductor can include a first winding formed from the first metallization layer, a second winding that is formed from the second metallization layer and that at least partially overlaps the first winding, a third winding that is formed from the third metallization layer and that at least partially overlaps the second winding, and a fourth winding that is formed from the third metallization layer and that laterally surrounds the third winding. [0007] An aspect of the disclosure provides wireless circuitry. The wireless circuitry can include a substrate having a first metallization layer, a second metallization layer, and a third metallization layer. The wireless circuitry can include an inductor embedded in the substrate. The inductor can include a first winding in the first metallization layer, a second winding in the second metallization layer, a third winding in the third metallization layer, a fourth winding in the third metallization layer that extends around the third winding, a fifth winding in the second metallization layer that extends around the second winding, and a sixth winding in the first metallization layer that extends around the first winding, wherein the inductor is configured to pass current from the first winding to the second winding, from the second winding to the third winding, from the third winding to the fourth winding, from the fourth winding to the fifth winding, and from the fifth winding to the sixth winding. [0008] An aspect of the disclosure provides an electronic device. The electronic device can include a semiconductor substrate having a first metallization layer, a second metallization layer, and a third metallization layer. The electronic device can include an inductor embedded in the substrate. The inductor can include a first winding in the first metallization layer, a second winding that is in the second metallization layer, that is coupled to the first winding, and that at least partially overlaps the first winding, a third winding that is in the third metallization layer, that is coupled to the second winding, and that at least partially overlaps the second winding, and a fourth winding that is in the first metallization layer and that extends around the first winding, the inductor being configured to pass current from the first winding to the second winding, from the second winding to the third winding, and from the third winding to the fourth winding. Brief Description of the Drawings [0009] FIG. 1 is a diagram of an illustrative electronic device having wireless circuitry in accordance with some embodiments. [0010] FIG. 2 is a diagram of illustrative wireless circuitry having on-chip inductors in accordance with some embodi