EP-4742547-A1 - RECEIVER CIRCUIT

EP4742547A1EP 4742547 A1EP4742547 A1EP 4742547A1EP-4742547-A1

Abstract

A wireless receiver circuit comprising terminals for coupling to an antenna and an impedance tuning circuit coupled between the terminals and a receiver path. The impedance tuning circuit being controllable to provide at least two impedance levels. A measurement circuit coupled to the impedance tuning circuit and configured to measure a voltage or current indicative of a signal received by the antenna for each of the at least two impedance levels. A timing circuit comprising one or more delay lines, wherein the one or more delay lines are configured to receive an initialization signal from the measurement circuit or the impedance tuning circuit. The timing circuit configured to provide one or more delayed signals to control of one or both of the measurement circuit and the impedance tuning circuit to measure the voltage or current for each of the two impedance levels.

Inventors

Zoescher, Lukas
MALINOWSKI, Slawomir Rafal
MEULMEESTER, Jacobus de
FINA, THOMAS

Assignees

NXP B.V.

Dates

Publication Date: 20260513
Application Date: 20241108

Claims (15)

A wireless receiver circuit comprising: terminals for coupling to an antenna; an impedance tuning circuit coupled between the terminals and a receiver path, wherein the impedance tuning circuit is controllable to provide at least two impedance levels; a measurement circuit coupled to the impedance tuning circuit and configured to measure a voltage or current indicative of a signal received by the antenna for each of the at least two impedance levels; and a timing circuit comprising one or more delay lines, wherein the one or more delay lines are configured to receive an initialization signal from the measurement circuit or the impedance tuning circuit and to provide one or more delayed signals to control of one or both of the measurement circuit and the impedance tuning circuit to measure the voltage for each of the two impedance levels.
The wireless receiver circuit of claim 1, wherein said control of one or both of the measurement circuit and the impedance tuning circuit to measure the voltage for each of the two impedance levels comprises: the impedance tuning circuit being configured to receive at least one of the one or more delayed signals to sequentially select one of the at least two impedance levels.
The wireless receiver circuit of claim 1 or claim 2, wherein said control of one or both of the measurement circuit and the impedance tuning circuit to measure the voltage for each of the two impedance levels comprises the measurement circuit being configured to receive at least one of the one or more delayed signals to: sample and hold a first voltage for a first of the at least two impedance levels; sample and hold a second voltage for a second of the at least two impedance levels; and compare the first voltage and the second voltage for determining which of the first impedance level and second impedance level of the at least two impedance levels to select to receive future, further signals.
The wireless receiver circuit of any preceding claim, wherein said control of one or both of the measurement circuit and the impedance tuning circuit to measure the voltage for each of the at least two impedance levels includes: selection of one of the at least two impedance levels based on which impedance level provides the highest voltage or current as measured by the measurement circuit.
The wireless receiver circuit of any preceding claim, wherein the wireless receiver circuit comprises a control circuit comprising one or more logic gates configured to provide for said control of one or both of the measurement circuit and the impedance tuning circuit and wherein the one or more delayed signals are configured to control said one or more logic gates.
The wireless receiver circuit of claim 5, wherein the wireless receiver circuit includes an envelope detector coupled between the impedance tuning circuit and the measurement circuit, the envelope detector configured to output an envelope voltage indicative of an envelope of the signal received by the antenna, wherein the envelope voltage comprises said voltage indicative of the signal received by the antenna.
The wireless receiver circuit of claim 6, wherein the measurement circuit further comprises a comparator configured to compare: the envelope voltage indicative of the signal received by the antenna for a first of the at least two impedance levels, and the envelope voltage indicative of the signal received by the antenna for a second of the at least two impedance levels, and provide an output indicative of which of the envelope voltages is the highest for use in setting the impedance tuning circuit to one of the at least two impedance levels that resulted in the highest envelope voltage.
The wireless receiver circuit of claims 6 to 7, wherein the control circuit is configured to receive the output of the comparator, and based on the output of the comparator, output the initialization signal to the timing circuit, wherein each of the one or more delay lines of the timing circuit is configured to output a respective one of the one or more delayed signals.
The wireless receiver circuit of claim 8, wherein a first delayed signal of the one or more delayed signals defines a time period for the measurement circuit to measure the envelope voltage, and a second delayed signal of the one or more delayed signals provides a feedback signal to the control circuit indicative of a start of a timing cycle to initiate said control circuit.
The wireless receiver circuit of any preceding claim, wherein the impedance tuning circuit comprises one or more of: switchable and/or variable capacitors; or switchable and/or variable inductors and the switchable and/or variable capacitors or the switchable and/or variable inductors are selectively controlled by the impedance tuning circuit to switch between each of the at least two impedance levels.
The wireless receiver circuit of claim 9, wherein the first delayed signal defines a comparison phase during which the comparator is configured to compare the envelope voltage to the first voltage or the second voltage, and the second delayed signal defines a sampling phase during which the measurement circuit is configured to: sample and hold the first voltage for the first of the at least two impedance levels; and sample and hold the second voltage for the second of the at least two impedance levels.
The wireless receiver circuit of claim 5, wherein the timing circuit is configured such that timing characteristics of the one or more delayed signals are based on a signal level or signal level change of: a signal received by the antenna; the initialization signal; a signal output by the impedance tuning circuit; a signal output by the measurement circuit; a signal output by the control circuit; or a further signal received by the control circuit.
The wireless receiver circuit of claim 5, wherein the control circuit is configured provide one or more signals to control the measurement circuit to provide a sample and hold phase having a predetermined duration based on a corresponding duration of at least one of the one or more delayed signals and wherein the control circuit is further configured to end the sample and hold phase prior to expiry of the predetermined duration based on a comparison by the measurement circuit being indicative that a currently selected impedance level of the at least two impedance levels provides a greater voltage than a previously measured voltage resulting from selection of another of the at least two impedance levels.
A method of operating a wireless receiver circuit comprising: terminals for coupling to an antenna, an impedance tuning circuit coupled between the terminals and a receiver path; a measurement circuit coupled to the impedance tuning circuit; and a timing circuit comprising one or more delay lines; the method comprising: providing an initialization signal to the timing circuit based on a signal received by the antenna; receiving one or more delayed signals from the one or more delay lines; providing said one or more delayed signals to control of one or both of the impedance tuning circuit and the measurement circuit for use in measuring a voltage or current indicative of a signal received by the antenna for each of at least two impedance levels provided by the impedance tuning circuit.
An RFID tag comprising the wireless receiver circuit of any of claims 1-13.

Description

Field The present disclosure relates to a receiver circuit, in particular, to a wireless receiver circuit. It also relates to a method for controlling said wireless receiver circuit and also to an electronic device comprising said wireless receiver circuit. Background Impedance matching between circuit components is important to ensure good coupling between wirelessly coupled devices, such as radio-frequency ID (RFID) tags. The coupling between devices can be improved by tuning the impedance of the wireless receiver circuit. Obtaining a good impedance match between components in the wireless receiver circuit is challenging and typically consumes additional power leading to reduced overall performance. Summary According to a first aspect of the present disclosure there is provided a wireless receiver circuit comprising: terminals for coupling to an antenna;an impedance tuning circuit coupled between the terminals and a receiver path, wherein the impedance tuning circuit is controllable to provide at least two impedance levels;a measurement circuit coupled to the impedance tuning circuit and configured to measure a voltage or current indicative of a signal received by the antenna for each of the at least two impedance levels; anda timing circuit comprising one or more delay lines, wherein the one or more delay lines are configured to receive an initialization signal from the measurement circuit or the impedance tuning circuit and to provide one or more delayed signals to control of one or both of the measurement circuit and the impedance tuning circuit to measure the voltage for each of the two impedance levels. In one or more examples, the initialization signal is based on a signal received from the antenna via the terminals. In one or more examples, the initialization signal may be provided to the timing circuit or to the one or more delay lines from a control circuit. In one or more embodiments said control of one or both of the measurement circuit and the impedance tuning circuit to measure the voltage for each of the two impedance levels comprises: the impedance tuning circuit being configured to receive at least one of the one or more delayed signals to sequentially select one of the at least two impedance levels. In one or more embodiments said control of one or both of the measurement circuit and the impedance tuning circuit to measure the voltage for each of the two impedance levels comprises the measurement circuit being configured to receive at least one of the one or more delayed signals to: sample and hold a first voltage for a first of the at least two impedance levels;sample and hold a second voltage for a second of the at least two impedance levels; andcompare the first voltage and the second voltage for determining which of the first impedance level and second impedance level of the at least two impedance levels to select to receive future, further signals. In one or more embodiments said control of one or both of the measurement circuit and the impedance tuning circuit to measure the voltage for each of the at least two impedance levels includes: selection of one of the at least two impedance levels based on which impedance level provides the highest voltage or current as measured by the measurement circuit. In one or more embodiments the wireless receiver circuit comprises a control circuit comprising one or more logic gates configured to provide for said control of one or both of the measurement circuit and the impedance tuning circuit and wherein the one or more delayed signals are configured to control said one or more logic gates. In one or more embodiments the wireless receiver circuit includes an envelope detector coupled between the impedance tuning circuit and the measurement circuit, the envelope detector configured to output an envelope voltage indicative of an envelope of the signal received by the antenna, wherein the envelope voltage comprises said voltage indicative of the signal received by the antenna. In one or more embodiments the measurement circuit further comprises a comparator configured to compare: the envelope voltage indicative of the signal received by the antenna for a first of the at least two impedance levels, andthe envelope voltage indicative of the signal received by the antenna for a second of the at least two impedance levels, andprovide an output indicative of which of the envelope voltages is the highest for use in setting the impedance tuning circuit to one of the at least two impedance levels that resulted in the highest envelope voltage. In one or more embodiments the control circuit is configured to receive the output of the comparator, and based on the output of the comparator, output the initialization signal to the timing circuit, wherein each of the one or more delay lines of the timing circuit is configured to output a respective one of the one or more delayed signals. In one or more embodiments a first delayed signal of the one or more delayed s