EP-4742663-A1 - DECODING DEVICE, ENCODING DEVICE, DECODING METHOD, AND ENCODING METHOD

EP4742663A1EP 4742663 A1EP4742663 A1EP 4742663A1EP-4742663-A1

Abstract

A decoder (200) includes memory (b2) and circuitry (b1) coupled to the memory (b2). In operation, the circuitry (b1): decodes, from a bitstream, information for determining, for each of regions in a picture, a set of control parameters for a neural network filter process to be applied to the picture (S401); decodes the picture from the bitstream (S402); and applies the neural network filter process to the picture (S403), and in the neural network filter process, a single neural network filter is used for the picture, and the set of control parameters determined based on the information is used for each of the regions.

Inventors

TEO, HAN BOON
LIM, CHONG SOON
GAO, Jingying
YADAV, PRAVEEN KUMAR
ABE, KIYOFUMI
NISHI, TAKAHIRO
SUGIO, TOSHIYASU

Assignees

Panasonic Intellectual Property Corporation of America

Dates

Publication Date: 20260513
Application Date: 20240530

Claims (20)

A decoder comprising: memory; and circuitry coupled to the memory, wherein in operation, the circuitry: decodes, from a bitstream, information for determining, for each of regions in a picture, a set of control parameters for a neural network filter process to be applied to the picture; decodes the picture from the bitstream; and applies the neural network filter process to the picture, and in the neural network filter process, a single neural network filter is used for the picture, and the set of control parameters determined based on the information is used for each of the regions.
The decoder according to claim 1, wherein the picture to which the neural network filter process has been applied is not used as a reference picture in decoding a subsequent picture after the picture in a decoding order, and is used for display.
The decoder according to claim 1, wherein the picture to which the neural network filter process has been applied is used as a reference picture in decoding a subsequent picture after the picture in a decoding order, and is used for display.
The decoder according to any one of claims 1 to 3, wherein the set of control parameters includes a change strength parameter that is a parameter for changing a filter parameter of the single neural network filter and is a parameter indicating a degree of change of the filter parameter, and in the neural network filter process, the filter parameter is changed based on the change strength parameter for each of the regions.
The decoder according to any one of claims 1 to 3, wherein the set of control parameters includes a threshold parameter indicating a range of a change width of a value to be changed in the neural network filter process, and in the neural network filter process, a value of a sample included in the picture is changed by the single neural network filter, and a change width of the value of the sample is clipped to the range based on the threshold parameter included in the set of control parameters determined for each of the regions.
The decoder according to any one of claims 1 to 3, wherein the information is decoded from a header region including at least one of a sequence parameter set (SPS), a picture parameter set (PPS), a picture header (PH), a slice header (SH), or supplemental enhancement information (SEI) in the bitstream.
The decoder according to any one of claims 1 to 3, wherein for each of the regions, the circuitry decodes the set of control parameters as the information from the bitstream.
The decoder according to any one of claims 1 to 3, wherein the circuitry decodes an index assigned to each of the regions, as the information from the bitstream, and the set of control parameters is selected for each of the regions from among sets of control parameters based on the index.
The decoder according to any one of claims 1 to 3, wherein the circuitry decodes a quantization parameter indicating a degree of quantization for each of the regions, as the information from the bitstream, and the set of control parameters is selected for each of the regions from among sets of control parameters based on the quantization parameter.
The decoder according to any one of claims 1 to 3, wherein the circuitry further decodes (i) a first parameter for use in determining the set of control parameters and (ii) a quantization parameter indicating a degree of quantization for each of the regions, as the information from the bitstream, and the set of control parameters is determined using the first parameter and the quantization parameter.
The decoder according to claim 10, wherein the set of control parameters is selected based on the quantization parameter from among sets of control parameters registered in a lookup table selected based on the first parameter from among lookup tables.
The decoder according to claim 10, wherein the first parameter is decoded from a header region including at least one of a sequence parameter set (SPS), a picture parameter set (PPS), a picture header (PH), a slice header (SH), or supplemental enhancement information (SEI) in the bitstream.
The decoder according to any one of claims 1 to 3, wherein the circuitry decodes, as the information, one of an index assigned to each of the regions or a quantization parameter indicating a degree of quantization for each of the regions from a header region including at least one of a sequence parameter set (SPS), a picture parameter set (PPS), a picture header (PH), a slice header (SH), or supplemental enhancement information (SEI) in the bitstream, and the set of control parameters is selected for each of the regions from among sets of control parameters based on the one of the index or the quantization parameter.
The decoder according to claim 9, wherein the regions are respectively coding units (CUs), and the set of control parameters is determined based on the quantization parameter for each of the CUs.
An encoder comprising: memory; and circuitry coupled to the memory, wherein in operation, the circuitry: encodes, into a bitstream, information for determining, for each of regions in a picture, a set of control parameters for a neural network filter process to be applied to the picture; and encodes the picture into the bitstream, and in the neural network filter process, a single neural network filter is used for the picture, and the set of control parameters determined based on the information is used for each of the regions.
The encoder according to claim 15, wherein the circuitry further applies the neural network filter process to the picture, and the picture to which the neural network filter process has been applied is used as a reference picture in encoding a subsequent picture after the picture in an encoding order.
The encoder according to claim 15 or 16, wherein the set of control parameters includes a change strength parameter that is a parameter for changing a filter parameter of the single neural network filter and is a parameter indicating a degree of change of the filter parameter, and in the neural network filter process, the filter parameter is changed based on the change strength parameter for each of the regions.
The encoder according to claim 15 or 16, wherein the set of control parameters includes a threshold parameter indicating a range of a change width of a value to be changed in the neural network filter process, and in the neural network filter process, a value of a sample included in the picture is changed by the single neural network filter, and a change width of the value of the sample is clipped to the range based on the threshold parameter included in the set of control parameters determined for each of the regions.
The encoder according to claim 15 or 16, wherein the information is encoded into a header region including at least one of a sequence parameter set (SPS), a picture parameter set (PPS), a picture header (PH), a slice header (SH), or supplemental enhancement information (SEI) in the bitstream.
The encoder according to claim 15 or 16, wherein for each of the regions, the circuitry encodes the set of control parameters as the information into the bitstream.

Description

[Technical Field] The present disclosure relates to a decoder and the like. [Background Art] With advancement in video coding technology, from H.261 and MPEG-1 to H.264/AVC (Advanced Video Coding), MPEG-LA, H.265/HEVC (High Efficiency Video Coding) and H.266/VVC (Versatile Video Codec), there remains a constant need to provide improvements and optimizations to the video coding technology to process an ever-increasing amount of digital video data in various applications. The present disclosure relates to further advancements, improvements and optimizations in video coding. Note that Non Patent Literature (NPL) 1 relates to one example of a conventional standard regarding the above-described video coding technology. Moreover, NPL 2 relates to neural network coding. [Citation List] [Non Patent Literature] [NPL 1] H.265 (ISO/IEC 23008-2 HEVC)/HEVC (High Efficiency Video Coding)[NPL 2] INTERNATIONAL STANDARD ISO/IEC 15938-17 First edition 2022-08 [Summary of Invention] [Technical Problem] Regarding the encoding scheme as described above, proposals of new schemes have been desired in order to (i) improve coding efficiency, enhance image quality, reduce processing amounts, reduce circuit scales, or (ii) appropriately select an element or an operation. The element is, for example, a filter, a block, a size, a motion vector, a reference picture, or a reference block. The present disclosure provides, for example, a configuration or a method which can contribute to at least one of increase in coding efficiency, increase in image quality, reduction in processing amount, reduction in circuit scale, appropriate selection of an element or an operation, etc. It is to be noted that the present disclosure may encompass possible configurations or methods which can contribute to advantages other than the above advantages. [Solution to Problem] For example, a decoder according to one aspect of the present disclosure includes memory and circuitry coupled to the memory. In operation, the circuitry: decodes, from a bitstream, information for determining, for each of regions in a picture, a set of control parameters for a neural network filter process to be applied to the picture; decodes the picture from the bitstream; and applies the neural network filter process to the picture, and in the neural network filter process, a single neural network filter is used for the picture, and the set of control parameters determined based on the information is used for each of the regions. Each of embodiments, or each of part of constituent elements and methods in the present disclosure enables, for example, at least one of the following: improvement in coding efficiency, enhancement in image quality, reduction in processing amount of encoding/decoding, reduction in circuit scale, improvement in processing speed of encoding/decoding, etc. Alternatively, each of embodiments, or each of part of constituent elements and methods in the present disclosure enables, in encoding and decoding, appropriate selection of an element or an operation. The element is, for example, a filter, a block, a size, a motion vector, a reference picture, or a reference block. It is to be noted that the present disclosure includes disclosure regarding configurations and methods which may provide advantages other than the above-described ones. Examples of such configurations and methods include a configuration or method for improving coding efficiency while reducing increase in processing amount. Additional benefits and advantages according to an aspect of the present disclosure will become apparent from the specification and drawings. The benefits and/or advantages may be individually obtained by the various embodiments and features of the specification and drawings, and not all of which need to be provided in order to obtain one or more of such benefits and/or advantages. It is to be noted that these general or specific aspects may be implemented using a system, an integrated circuit, a computer program, or a computer readable medium (recording medium) such as a CD-ROM, or any combination of systems, methods, integrated circuits, computer programs, and media. [Advantageous Effects of Invention] A configuration or method according to an aspect of the present disclosure enables, for example, at least one of the following: improvement in coding efficiency, enhancement in image quality, reduction in processing amount, reduction in circuit scale, improvement in processing speed, appropriate selection of an element or an operation, etc. It is to be noted that the configuration or method according to an aspect of the present disclosure may provide advantages other than the above-described ones. [Brief Description of Drawings] [FIG. 1] FIG. 1 is a schematic diagram illustrating one example of a configuration of a transmission system according to an embodiment.[FIG. 2] FIG. 2 is a diagram illustrating one example of a hierarchical structure of data in a stream.[FIG. 3] FIG. 3 i