EP-4742852-A1 - SILICON CARBIDE METAL-OXIDE-SEMICONDUCTOR FIELD-EFFECT TRANSISTOR AND MANUFACTURING METHOD THEREOF

Abstract

The invention provides a method for manufacturing a silicon carbide metal-oxide-semiconductor field-effect transistor, which includes the following steps: providing a SiC substrate; forming an N-type SiC epitaxial layer with a top surface on the SiC substrate; forming two doped structures in the N-type SiC epitaxial layer adjacent to the top surface, wherein each doped structure includes a P-type well, an N+ doped region, and a P+ doped region, the N+ doped region is located in the P-type well, and the P+ doped region is located in the P-type well and adjacent to the N+ doped region; depositing a silicon-rich nitride film on the top surface; depositing a gate oxide layer on the silicon-rich nitride film, wherein the gate oxide layer and the N-type SiC epitaxial layer are insulated by the silicon-rich nitride film; performing a post-oxidation annealing process for the gate oxide layer; and forming a gate structure on the gate oxide layer.

Inventors

• WANG, PEI-JEN
• HUANG, Pin-Yen

Assignees

• ProAsia Semiconductor Corporation

Dates

Publication Date

20260513

Application Date

20250902

Claims (10)

1. A method for manufacturing a silicon carbide metal-oxide-semiconductor field-effect transistor, comprising the steps of: providing a silicon carbide substrate; forming an N-type silicon carbide epitaxial layer on the silicon carbide substrate, wherein the N-type silicon carbide epitaxial layer includes a top surface; forming two doped structures in the N-type silicon carbide epitaxial layer adjacent to the top surface, wherein each of the doped structures includes a P-type well, an N+ doped region, and a P+ doped region, the N+ doped region is located in the P-type well, and the P+ doped region is located in the P-type well and adjacent to the N+ doped region; depositing a silicon-rich nitride film on the top surface; depositing a gate oxide layer on the silicon-rich nitride film, wherein the silicon-rich nitride film insulates the gate oxide layer from the N-type silicon carbide epitaxial layer; performing a post-oxidation annealing process for the gate oxide layer; and forming a gate structure on the gate oxide layer.
2. The method for manufacturing a silicon carbide metal-oxide-semiconductor field-effect transistor according to Claim 1, wherein the thickness of the silicon-rich nitride film is between 50Å and 150Å.
3. The method for manufacturing a silicon carbide metal-oxide-semiconductor field-effect transistor according to any of the previous Claims, wherein the silicon-rich nitride film is deposited on the top surface by an atomic layer deposition process.
4. The method for manufacturing a silicon carbide metal-oxide-semiconductor field-effect transistor according to any of the previous Claims, wherein the post-oxide annealing process is performed in an environment containing nitric oxide or nitrous oxide for high-temperature annealing.
5. The method for manufacturing a silicon carbide metal-oxide-semiconductor field-effect transistor according to any of the previous Claims, wherein the gate structure is made of polysilicon or metal.
6. A silicon carbide metal-oxide-semiconductor field-effect transistor, comprising: a silicon carbide substrate; an N-type silicon carbide epitaxial layer, formed on the silicon carbide substrate and including a top surface; two doped structures, formed in the N-type silicon carbide epitaxial layer adjacent to the top surface, wherein each of the doped structures includes a P-type well, an N+ doped region, and a P+ doped region, the N+ doped region is located in the P-type well, and the P+ doped region is located in the P-type well and adjacent to the N+ doped region; a silicon-rich nitride film, located on the top surface; a gate oxide layer, located on the silicon-rich nitride film, wherein the silicon-rich nitride film insulates the gate oxide layer from the N-type silicon carbide epitaxial layer; and a gate structure, located on the gate oxide layer.
7. The silicon carbide metal-oxide-semiconductor field-effect transistor according to Claim 6, wherein the thickness of the silicon-rich nitride film is between 50Å and 150Å.
8. The silicon carbide metal-oxide-semiconductor field-effect transistor according to Claims 6 or 7, wherein the silicon-rich nitride film is deposited on the top surface by an atomic layer deposition process.
9. The silicon carbide metal-oxide-semiconductor field-effect transistor according to any of the previous Claims 6 to 8, wherein the gate oxide layer is processed by a post-oxide annealing process, and the post-oxide annealing process is performed in an environment containing nitric oxide or nitrous oxide for high-temperature annealing.
10. The silicon carbide metal-oxide-semiconductor field-effect transistor according to any of the previous Claims 6 to 9, wherein the gate structure is made of polysilicon or metal.

Description

CROSS-REFERENCES TO RELATED APPLICATIONS This application claims the benefit of priority to Taiwanese Patent Application No. 113142945 filed on November 8, 2024, which is hereby incorporated by reference in its entirety. BACKGROUND OF THE INVENTION Field of the Invention The present invention relates to a silicon carbide metal-oxide-semiconductor field-effect transistor and a method for manufacturing the same, and more particularly to a silicon carbide metal-oxide-semiconductor field-effect transistor and a method for manufacturing the same that improve interface quality to enhance channel mobility. Descriptions of the Related Art Silicon carbide metal-oxide-semiconductor field-effect transistors (SiC MOSFETs) possess characteristics such as high temperature resistance, high voltage tolerance, and low on-resistance, making them suitable for high-speed power devices. They can provide higher electron mobility and faster switching speeds. However, the interface between the silicon carbide substrate and the gate oxide layer in SiC MOSFETs tends to generate oxygen vacancy defects, which increase the interface trap density. This causes electrons to be trapped while flowing through the interface, resulting in reduced channel mobility and increased channel resistance. Since channel resistance constitutes a large portion of the on-resistance, an increase in channel resistance will also lead to an increase in on-resistance, causing greater device power loss and potentially severe reliability issues. Therefore, how to design a silicon carbide metal-oxide-semiconductor field-effect transistor and a manufacturing method thereof that can improve the aforementioned problems is indeed a subject worthy of study. SUMMARY OF THE INVENTION The objective of the present invention is to provide a method for manufacturing a silicon carbide metal-oxide-semiconductor field-effect transistor that improves interface quality to enhance channel mobility. To achieve the aforementioned objective, the method for manufacturing a silicon carbide metal-oxide-semiconductor field-effect transistor according to the present invention comprises the steps of: providing a silicon carbide substrate; forming an N-type silicon carbide epitaxial layer on the silicon carbide substrate, wherein the N-type silicon carbide epitaxial layer includes a top surface; forming two doped structures in the N-type silicon carbide epitaxial layer adjacent to the top surface, wherein each of the doped structures includes a P-type well, an N+ doped region, and a P+ doped region, the N+ doped region is located in the P-type well, and the P+ doped region is located in the P-type well and adjacent to the N+ doped region; depositing a silicon-rich nitride film on the top surface; depositing a gate oxide layer on the silicon-rich nitride film, wherein the silicon-rich nitride film insulates the gate oxide layer from the N-type silicon carbide epitaxial layer; performing a post-oxidation annealing process for the gate oxide layer; and forming a gate structure on the gate oxide layer. In one embodiment of the present invention, the thickness of the silicon-rich nitride film is between 50Å and 150Å. In one embodiment of the present invention, the silicon-rich nitride film is deposited on the top surface by an atomic layer deposition process. In one embodiment of the present invention, the post-oxidation annealing process is performed in an environment containing nitric oxide or nitrous oxide for high-temperature annealing. In one embodiment of the present invention, the gate structure is made of polysilicon or metal. The present invention further provides a silicon carbide metal-oxide-semiconductor field-effect transistor. The silicon carbide metal-oxide-semiconductor field-effect transistor of the present invention comprises a silicon carbide substrate, an N-type silicon carbide epitaxial layer, two doped structures, a silicon-rich nitride film, a gate oxide layer, and a gate structure. The N-type silicon carbide epitaxial layer includes a top surface. The two doped structures are formed in the N-type silicon carbide epitaxial layer adjacent to the top surface, wherein each of the doped structures includes a P-type well, an N+ doped region, and a P+ doped region, the N+ doped region is located in the P-type well, and the P+ doped region is located in the P-type well and adjacent to the N+ doped region. The silicon-rich nitride film is located on the top surface. The gate oxide layer is located on the silicon-rich nitride film, wherein the silicon-rich nitride film insulates the gate oxide layer from the N-type silicon carbide epitaxial layer. The gate structure is located on the gate oxide layer. BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a schematic diagram of the structure of the silicon carbide metal-oxide-semiconductor field-effect transistor of the present invention.FIG. 2 is a flowchart of the manufacturing method of the silicon carbide metal-oxide-semiconductor field-e