FR-3168316-A1 - Method for making a CFET transistor device
Abstract
Method for the fabrication of a CFET transistor device Method for the fabrication of a CFET transistor device, comprising: - fabrication, on a first dielectric bonding layer (108), of a first stack (102) comprising first and second semiconductor layers (104, 106) arranged one on top of the other and which can be selectively etched; - etching, through the first stack (102), trenches forming active regions in the form of nanosheets; - deposition of a dielectric filler material in the trenches; - bonding of the first dielectric bonding layer to a second stack (126) comprising third and fourth semiconductor layers (128, 130) arranged one on top of the other and which can be selectively etched; - annealing carried out at a temperature greater than or equal to 200°C. Figure for the abstract: Fig. 6
Inventors
- Franck Fournel
- Vincent Larrey
Assignees
- Commissariat à l'Energie Atomique et aux Energies Alternatives
Dates
- Publication Date
- 20260508
- Application Date
- 20241105