Multichip semiconductor build with flexible power and signal distribution interconnections

Abstract

A semiconductor structure includes a first semiconductor chip having a surface with a plurality of conductive features thereon; a second semiconductor chip having a surface with a plurality of conductive features thereon; and a bridge chip coupling the first and second semiconductor chips through the pluralities of conductive features. The bridge chip includes a first surface facing the surfaces of the first and second chips with the conductive features thereon. The bridge chip has a second surface, a BEOL coupled to conductive features on the first surface that are in turn coupled to the pluralities of conductive features, an active device layer having a plurality of devices below the BEOL, a MOL layer in between the active device layer and the BEOL, and a backside power distribution network (BSPDN) below the active layer and coupled to devices on the active layer of the bridge chip.

Inventors

Manasa Medikonda
TAO LI
RUILONG XIE
JOSHUA RUBIN

Assignees

IBM

Dates

Publication Date: 20260506
Application Date: 20250507
Priority Date: 20250507