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JP-2022531127-A5 -

JP2022531127A5JP 2022531127 A5JP2022531127 A5JP 2022531127A5JP-2022531127-A5

Dates

Publication Date
20230523
Application Date
20200424

Description

Multi-state pulsation is performed to achieve equilibrium between various stages of processing operations, such as equilibrium between deposition stages and etching stages. For example, multi-state pulsation with two lower power levels is applied to perform the deposition stage, and multi-state pulsation with two higher power levels is applied to perform the etching stage. The two lower power levels have lower power than the higher power level. As an example, the etching operation is conductor etching performed in an inductively coupled plasma (ICP) chamber. The RF generator is coupled to an electrode in the ICP plasma chamber, such as a transformer-coupled plasma (TCP) electrode or bias electrode, via an impedance matching circuit. Similarly, the bias RF generator 104 generates an RF signal 168 upon receiving a synchronization signal 146 and source variables via the transmission cable system 134. The RF signal 168 has bias variables such as frequency and power or voltage, which are received by the bias RF generator 104 from the processor 118. The RF signal 168 is transmitted from the output 160 of the bias RF generator 104 to the input 162 of the bias matcher 110 via the RF cable 142. The bias matcher 110 receives the RF signal 168, corrects the impedance of the RF signal 168, and matches the impedance of the load coupled to the output 164 of the bias matcher 110 with the impedance of the source coupled to the input 162 of the bias matcher 110. The bias matcher 110 corrects the impedance of the RF signal 168 and outputs a corrected RF signal 170 at the output 164 of the bias matcher 110. The corrected RF signal 170 is transmitted from the output 164 to the lower electrode embedded in the substrate 128 via the RF rod of the RF transmission line 144. Figure 2 is a diagram of one embodiment of system 200, showing details of the RF generator 202. System 200 includes the RF generator 202 and a host computer 106. System 200 further includes a matching unit 216 and an RF cable 218. RF generator 202 is an example of a source RF generator 102 or a bias RF generator 104 (Figure 1). Matching unit 216 is an example of a source matching unit 108 or a bias matching unit 110 (Figure 1). RF cable 218 is an example of an RF cable 138 or an RF cable 142 (Figure 1), which is coupled to the output 217 of the RF power supply 222. RF generator 202 includes a digital signal processor (DSP) 204, a parameter controller (PRS1) 206, a parameter controller (PRS2) 208, a frequency controller (FC) 210, a driver system 212, and an RF power supply 222. The processor 118 is coupled to the DSP 204 via the transmission cable system 214. The transmission cable system 214 is an example of the transmission cable system 130 or the transmission cable system 134 (Figure 1). The digital signal processor 204 is coupled to parameter controllers 206 and 208, and the frequency controller 210. The parameter controllers 206 and 208 are coupled to the driver system 212, which is coupled to the RF power supply 222. The frequency controller 210 is also coupled to the driver system 212. The RF power supply 222 is coupled to the matching unit 216 via the RF cable 218. Furthermore, upon receiving a variable, the DSP 204 supplies parameters such as the power level or voltage level of state S2 of the RF signal 220 to the parameter controller 208, and stores the parameters of state S2 in the memory device of the parameter controller 208. Similarly, upon receiving a variable, the DSP 204 supplies the frequency level to the frequency controller 210, and stores it in the memory device of the frequency controller 210. Similarly, upon receiving the synchronization signal 146, the DSP 204 transmits a command signal for state S2 to the parameter controller 208 during each cycle of the synchronization signal 146. For example, the DSP 204 transmits a command signal for state S2 to the parameter controller 208 when transitioning from state S1 or from state S0 to state S2. The command signal for state S2 transmitted to the parameter controller 208 includes the time period of state S2 between each cycle, and the parameter controller 208 supplies the parameter level for state S2 to the driver system 212. Upon receiving the command signal for state S2, the parameter controller 208 accesses the parameter level for state S2 from its memory device and transmits the parameter level for the time period of state S2 to the driver system 212. For example, the parameter controller 208 transmits the parameter level for state S2 to the driver system 212 when transitioning from state S1 or from state S0 to state S2. After the time period of state S2, the parameter controller 208 does not transmit the parameter level of state S2 to the driver system 212 during the cycle of the synchronization signal 146. Each cycle of the synchronization signal described herein is repeated periodically. For example, cycle 2 of the synchronization signal follows, followed by cycle 1 of the synchronization