JP-2024168109-A5 -

Dates

Publication Date

20260507

Application Date

20230523

Description

A nitride semiconductor device according to one aspect of the present disclosure includes a substrate, a first nitride semiconductor layer provided above the substrate, a first p-type nitride semiconductor layer provided above the first nitride semiconductor layer, a second nitride semiconductor layer provided above the first p-type nitride semiconductor layer, an electron transport layer and an electron supply layer provided in order from below so as to cover the side and bottom surfaces of a first opening that penetrates the second nitride semiconductor layer and the first p-type nitride semiconductor layer and reaches the first nitride semiconductor layer, and the upper surface of the second nitride semiconductor layer, and above the electron supply layer, a position provided in which the bottom surface of the first opening overlaps with the bottom surface of the first opening in a plan view of the substrate. The device comprises a second p-type nitride semiconductor layer or insulating layer, a gate electrode provided above the electron supply layer at a position overlapping the second nitride semiconductor layer in a plan view of the substrate, a first source electrode provided at a position away from the gate electrode in a plan view of the substrate, covering a second opening that penetrates the electron supply layer and the electron transport layer and reaches the first p-type nitride semiconductor layer, and electrically connected to the first p-type nitride semiconductor layer, a drain electrode provided below the substrate, and a second source electrode provided above the second p-type nitride semiconductor layer or insulating layer and electrically connected to the first source electrode. A nitride semiconductor device according to a first aspect of the present disclosure includes a substrate, a first nitride semiconductor layer provided above the substrate, a first p-type nitride semiconductor layer provided above the first nitride semiconductor layer, a second nitride semiconductor layer provided above the first p-type nitride semiconductor layer, an electron transport layer and an electron supply layer provided in order from below so as to cover the side and bottom surfaces of a first opening that penetrates the second nitride semiconductor layer and the first p-type nitride semiconductor layer and reaches the first nitride semiconductor layer, and the upper surface of the second nitride semiconductor layer, and above the electron supply layer, a position that overlaps with the bottom surface of the first opening in a plan view of the substrate. The device comprises a second p-type nitride semiconductor layer or insulating layer, a gate electrode provided above the electron supply layer at a position overlapping the second nitride semiconductor layer in a plan view of the substrate, a first source electrode provided at a position away from the gate electrode in a plan view of the substrate, covering a second opening that penetrates the electron supply layer and the electron transport layer and reaches the first p-type nitride semiconductor layer, and electrically connected to the first p-type nitride semiconductor layer, a drain electrode provided below the substrate, and a second source electrode provided above the second p-type nitride semiconductor layer or insulating layer and electrically connected to the first source electrode.