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JP-2026074566-A - Insulated switch

JP2026074566AJP 2026074566 AJP2026074566 AJP 2026074566AJP-2026074566-A

Abstract

[Challenge] Increase the high level of the switch drive signal. [Solution] The isolation switch 400 includes a switch circuit 422 connected between a first node T4 and a second node T5 and switched on/off by a switch drive signal Vg; a first transformer 431 and a second transformer 432 in which a first primary coil 431p and a second primary coil 432p are connected in parallel between a power terminal VCC and a ground terminal GND, and a first secondary coil 431s and a second secondary coil 432s are connected in series with each other; a first pulse generation circuit 411 and a second pulse generation circuit 412 that pulse-drive the first primary coil 431p and the second primary coil 432p respectively in response to an input pulse DIN; and a switch drive circuit 421 that receives induced voltages Vs1 and Vs2 generated in the first secondary coil 431s and the second secondary coil 432s respectively and generates a switch drive signal Vg. [Selection Diagram] Figure 11

Inventors

  • 齊藤 弘治

Assignees

  • ローム株式会社

Dates

Publication Date
20260507
Application Date
20241021

Claims (17)

  1. A switch circuit connected between the first node and the second node and configured to be turned on/off by a switch drive signal, A first transformer and a second transformer are configured such that the first primary coil and the second primary coil are connected in parallel between the power supply terminal and the ground terminal, and the first secondary coil and the second secondary coil are connected in series with each other. A first pulse generation circuit and a second pulse generation circuit are configured to pulse-drive the first primary coil and the second primary coil, respectively, in response to an input pulse. A switch drive circuit configured to generate the switch drive signal by receiving the induced voltage generated in the first secondary coil and the second secondary coil, respectively, An insulated switch equipped with this feature.
  2. The isolation switch according to claim 1, wherein the switch circuit includes at least one output transistor whose gate is connected to the application terminal of the switch drive signal.
  3. The isolation switch according to claim 2, wherein the output transistor is a GaN device or a SiC device.
  4. The isolation switch according to claim 2, wherein the switch drive circuit is configured to generate the switch drive signal by rectifying the sum of the first induced voltage generated in the first secondary coil and the second induced voltage generated in the second secondary coil.
  5. The isolation switch according to claim 4, wherein the first pulse generation circuit and the second pulse generation circuit are configured to perform pulse driving on the first primary coil and the second primary coil, respectively, when the input pulse is at a first logic level, and to stop the pulse driving on the first primary coil and the second primary coil, respectively, when the input pulse is at a second logic level.
  6. The isolation switch according to claim 2, wherein the switch drive circuit includes: a first rectifier circuit configured to rectify a first induced voltage generated in the first secondary coil to generate a first rectified voltage; a second rectifier circuit configured to rectify the sum of the first rectified voltage and a second induced voltage generated in the second secondary coil to generate a second rectified voltage; and a transistor configured to conduct/block the connection between the application terminal of the second rectified voltage and the application terminal of the switch drive signal according to the difference voltage between the first rectified voltage and the second rectified voltage.
  7. The isolation switch according to claim 6, wherein the first rectifier circuit includes a first diode configured to be connected between the application terminal of the first induced voltage and the application terminal of the first rectified voltage, and a first capacitor configured to be connected between the application terminal of the first rectified voltage and the second node, and the second rectifier circuit includes a second diode configured to be connected between the application terminal of the second induced voltage and the application terminal of the second rectified voltage.
  8. The isolation switch according to claim 7, further comprising a second capacitor configured to be connected between the application terminal of the second rectified voltage and the second node.
  9. The first pulse generation circuit is configured to pulse drive the first primary coil whether the input pulse is at a first logic level or a second logic level. The isolation switch according to claim 6, wherein the second pulse generation circuit is configured to pulse drive the second primary coil when the input pulse is at the first logic level, and to stop pulse driving the second primary coil when the input pulse is at the second logic level.
  10. The isolation switch according to claim 2, wherein the switch drive circuit includes a discharge circuit configured to discharge the switch drive signal.
  11. The isolation switch according to claim 10, wherein the discharge circuit includes a discharge resistor configured to be connected between the application terminal of the switch drive signal and the second node.
  12. The isolation switch according to claim 6, wherein the switch drive circuit includes a discharge switch configured to be connected between the application terminal of the switch drive signal and the second node, and a controller configured to drive the discharge switch in response to the second induced voltage.
  13. The isolation switch according to claim 12, wherein the controller operates using the first rectified voltage or the switch drive signal as a power source.
  14. A third transformer including a third primary coil and a third secondary coil, A fourth transformer including a fourth primary coil and a fourth secondary coil, Furthermore, The first pulse generation circuit simultaneously pulse-drives the first primary coil and the third primary coil, The second pulse generation circuit simultaneously pulses the second primary coil and the fourth primary coil, The isolation switch according to claim 2, wherein the switch drive circuit includes: a first boost circuit configured to generate a first boost voltage from a first induced voltage generated in the first secondary coil and a third induced voltage generated in the third secondary coil; a first rectifier circuit configured to generate a first rectified voltage by rectifying the first boost voltage; a second boost circuit configured to generate a second boost voltage from a second induced voltage generated in the second secondary coil and a fourth induced voltage generated in the fourth secondary coil; a second rectifier circuit configured to generate a second rectified voltage by rectifying the sum of the first rectified voltage and the second boost voltage; and a transistor configured to conduct/block the connection between the application terminal of the second rectified voltage and the application terminal of the switch drive signal according to the difference voltage between the first rectified voltage and the second rectified voltage.
  15. The isolation switch according to claim 2, wherein the switch circuit includes a first output transistor and a second output transistor as output transistors, each having its gate connected to the application terminal of the switch drive signal and its source connected to a common node.
  16. The isolated switch according to any one of claims 1 to 15, wherein the switch drive circuit includes a voltage control circuit configured to stabilize the switch drive signal.
  17. The isolation switch according to claim 16, wherein the voltage control circuit includes a Zener diode configured to be connected between the application terminal of the switch drive signal and the reference potential terminal.

Description

This disclosure relates to an insulated switch. Conventionally, isolated switches, which electrically isolate the primary and secondary circuit systems while driving the switch elements of the secondary circuit system in response to the control signal of the primary circuit system, have been used in various applications (such as power supplies or motor drive systems). Furthermore, an example of prior art related to the above is Patent Document 1 by the present applicant. International Publication No. 2022/070944 [overview] Conventional insulated switches had room for improvement in their signal transmission methods. The isolation switch according to this disclosure comprises: a switch circuit connected between a first node and a second node and configured to be turned on/off by a switch drive signal; a first transformer and a second transformer configured such that a first primary coil and a second primary coil are connected in parallel between a power supply terminal and a ground terminal, and a first secondary coil and a second secondary coil are connected in series with each other; a first pulse generation circuit and a second pulse generation circuit configured to pulse-drive the first primary coil and the second primary coil, respectively, in response to an input pulse; and a switch drive circuit configured to generate the switch drive signal by receiving induced voltages generated in the first secondary coil and the second secondary coil, respectively. Figure 1 shows the basic configuration of a signal transmission device.Figure 2 shows the basic structure of a transformer chip.Figure 3 is a perspective view of a semiconductor device used as a two-channel transformer chip.Figure 4 is a plan view of the semiconductor device shown in Figure 3.Figure 5 is a plan view showing the layer in the semiconductor device of Figure 3 where the low-potential coil is formed.Figure 6 is a plan view showing the layer in the semiconductor device of Figure 3 where the high-potential coil is formed.Figure 7 is a cross-sectional view along the line VIII-VIII shown in Figure 6.Figure 8 shows an enlarged view (separated structure) of region XIII shown in Figure 7.Figure 9 is a schematic diagram showing an example of a transformer chip layout.Figure 10 shows a comparative example of an insulated switch.Figure 11 shows a first embodiment of an insulating switch.Figure 12 shows a second embodiment of the insulated switch.Figure 13 shows a third embodiment of the insulated switch.Figure 14 shows a fourth embodiment of the insulated switch.Figure 15 shows an example of a controller configuration.Figure 16 shows a modified example of the controller.Figure 17 shows a fifth embodiment of the insulated switch.Figure 18 shows a sixth embodiment of the insulating switch.Figure 19 shows a seventh embodiment of the insulated switch.Figure 20 shows an eighth embodiment of the insulated switch.Figure 21 shows a ninth embodiment of the insulated switch.Figure 22 shows a tenth embodiment of the insulated switch.Figure 23 shows an example of a voltage control circuit configuration. [Detailed explanation] <Signal transmission device (basic configuration)> Figure 1 shows the basic configuration of a signal transmission device. The signal transmission device 200 in this example configuration is a semiconductor integrated circuit device (a so-called isolated gate driver IC) that transmits pulse signals from the primary circuit system 200p to the secondary circuit system 200s while insulating the primary circuit system 200p (VCC1-GND1 system) and the secondary circuit system 200s (VCC2-GND2 system), and drives the gate of a switch element (not shown) provided in the secondary circuit system 200s. For example, the signal transmission device 200 consists of a controller chip 210, a driver chip 220, and a transformer chip 230, all sealed in a single package. The controller chip 210 is a semiconductor chip that operates on a power supply voltage VCC1 (for example, a maximum of 7V relative to GND1). The controller chip 210 integrates, for example, a pulse transmission circuit 211 and buffers 212 and 213. The pulse transmission circuit 211 is a pulse generator that generates transmission pulse signals S11 and S21 in response to the input pulse signal IN. More specifically, when the pulse transmission circuit 211 indicates that the input pulse signal IN is high level, it performs pulse driving of transmission pulse signal S11 (single or multiple transmission pulse outputs), and when it indicates that the input pulse signal IN is low level, it performs pulse driving of transmission pulse signal S21. In other words, the pulse transmission circuit 211 pulses either transmission pulse signal S11 or S21 depending on the logic level of the input pulse signal IN. The buffer 212 receives the input of the transmission pulse signal S11 from the pulse transmission circuit 211 and pulse-drives the transformer chip 230 (specifically the transformer 231). The buffer