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JP-2026074620-A - Semiconductor equipment

JP2026074620AJP 2026074620 AJP2026074620 AJP 2026074620AJP-2026074620-A

Abstract

[Problem] To suppress misalignment between two wiring boards. [Solution] The semiconductor device comprises a first wiring board, an electronic component, a second wiring board, and a plurality of connecting members. The electronic component is provided on the first wiring board. The second wiring board is laminated on the first wiring board with the electronic component in between. The plurality of connecting members are arranged around the electronic component and connect the first wiring board and the second wiring board. Each of the plurality of connecting members has a pair of cores adjacent to each other in the lamination direction of the first and second wiring boards, and a conductive film covering the pair of cores. In at least the connecting members arranged in the innermost or outermost row relative to the electronic component, one of the pair of cores closer to the second wiring board is offset relative to the other core closer to the first wiring board in a direction toward or toward the electronic component. [Selection Diagram] Figure 2

Inventors

  • 関島 信一朗

Assignees

  • 新光電気工業株式会社

Dates

Publication Date
20260507
Application Date
20241021

Claims (9)

  1. First wiring board and Electronic components provided on the first wiring board, A second wiring board is laminated on the first wiring board with the electronic components sandwiched in between, The electronic component has a plurality of connecting members arranged around it to connect the first wiring board and the second wiring board, Each of the aforementioned plurality of connecting members is A pair of cores adjacent to each other in the stacking direction of the first wiring board and the second wiring board, The pair of cores are covered by a conductive film, A semiconductor device characterized in that, among the plurality of connecting members, at least one connecting member arranged in the innermost or outermost row relative to the electronic component is offset from the other core of the pair of cores that is closer to the electronic component or away from the electronic component, in a direction either toward the electronic component or toward the electronic component.
  2. The aforementioned plurality of connecting members are In a plan view from the stacking direction, the electronic component is arranged on multiple frame lines that surround its outer circumference and are at different distances from the center of the electronic component. The semiconductor device according to claim 1, wherein, among the plurality of connecting members, in a connecting member arranged on the frame line closest to the electronic component or on the frame line furthest from the electronic component, one core is offset relative to the other core in a direction toward the electronic component or away from the electronic component.
  3. The aforementioned plurality of connecting members are In a plan view from the stacking direction, the electronic components are arranged along a plurality of straight lines that extend along two opposing sides of the electronic component and are at different distances from the center of the electronic component. The semiconductor device according to claim 1, wherein, among the plurality of connecting members, in a connecting member arranged on the straight line closest to the electronic component or on the straight line furthest from the electronic component, one core is offset relative to the other core in a direction toward the electronic component or away from the electronic component.
  4. The aforementioned plurality of connecting members are In a plan view from the stacking direction, the components are arranged along the plurality of straight lines and along two other opposing sides of the electronic component. The semiconductor device according to claim 3, wherein, among the plurality of connecting members, in the connecting members arranged on the straight line closest to the electronic component and on another straight line, one core is offset from the other core in a direction toward the electronic component or toward the electronic component.
  5. The semiconductor device according to claim 1, wherein in all of the plurality of connecting members, one core is offset from the other core in a direction toward the electronic component or away from the electronic component.
  6. The first wiring board is, It has a first pad connected to a connecting member arranged in the innermost or outermost row to the aforementioned electronic component, The aforementioned second wiring board is It has a second pad connected to a connecting member arranged in the innermost or outermost row to the aforementioned electronic component, The aforementioned second pad is The semiconductor device according to claim 1, characterized in that it is arranged offset from the first pad in a direction toward the electronic component or away from the electronic component.
  7. The first wiring board is, The first insulating layer covers the upper surface of the substrate of the first wiring board and has an opening that exposes the first pad, The aforementioned second wiring board is The second insulating layer covers the lower surface of the substrate of the second wiring board and has an opening that exposes the second pad, The opening in the second insulating layer is The semiconductor device according to claim 6, characterized in that it is arranged offset from the opening of the first insulating layer in a direction approaching the electronic component or in a direction away from the electronic component.
  8. Each of the aforementioned plurality of connecting members is This is an integrated product formed by integrating the conductive film of a first conductor ball, which is formed by covering one of the aforementioned cores with a conductive film and mounted on the first wiring board, with the conductive film of a second conductor ball, which is formed by covering the other core with a conductive film and mounted on the second wiring board. The offset amount of one core relative to the other core is, The semiconductor device according to claim 1, characterized in that the diameter is smaller than the diameter of the first conductor ball or the second conductor ball.
  9. In at least one of the plurality of connecting members arranged in the innermost or outermost row relative to the electronic component, one of the pair of cores, the core closer to the second wiring board, is offset relative to the other core closer to the first wiring board in a direction toward the center of the electronic component or away from the center of the electronic component. The semiconductor device according to feature 1.

Description

This invention relates to a semiconductor device. In recent years, semiconductor devices that embed electronic components, such as semiconductor chips, within a substrate have attracted attention in order to achieve high-density component mounting. Such semiconductor devices typically consist of two wiring boards, with electronic components such as semiconductor chips mounted on one board and sandwiched between the other wiring board. Two wiring boards are connected by a connecting member. Specifically, conductive balls mounted on one wiring board are positioned above conductive balls mounted on the other wiring board, and the other wiring board is stacked on top of the first. The conductive balls are formed by covering a spherical core with a conductive film such as solder. The conductive films of the two conductive balls mounted on the two stacked wiring boards are then melted and integrated by heat and pressure. In this way, the two wiring boards are connected by a connecting member having a pair of cores adjacent to each other in the stacking direction of the two wiring boards and a conductive film covering these cores. Japanese Patent Publication No. 2004-342959 Figure 1 is a diagram showing the configuration of a semiconductor device according to an embodiment.Figure 2 shows an example of the arrangement of multiple connecting members, a lower core, and an upper core according to the embodiment.Figure 3 shows another example of the arrangement of multiple connecting members, a lower core, and an upper core according to the embodiment.Figure 4 is a flowchart showing the method for manufacturing the first wiring board according to the embodiment.Figure 5 is a schematic diagram showing a cross-section of the first wiring board.Figure 6 is a diagram illustrating the mounting of electronic components.Figure 7 shows a specific example of the conductive ball mounting process.Figure 8 is a flowchart showing the method for manufacturing the second wiring board according to the embodiment.Figure 9 is a schematic diagram showing a cross-section of the second wiring board.Figure 10 shows a specific example of the conductive ball mounting process.Figure 11 is a flowchart showing a method for manufacturing a semiconductor device according to an embodiment.Figure 12 illustrates the stacking of the first and second wiring boards.Figure 13 shows a specific example of the joining process.Figure 14 shows a specific example of the molding process.Figure 15 shows a specific example of the individualization process.Figure 16 shows an example of the arrangement of multiple connecting members, a lower core, and an upper core according to a modified example 1 of the embodiment.Figure 17 shows an example of the arrangement of multiple connecting members, a lower core, and an upper core according to a modified example 2 of the embodiment.Figure 18 shows an example of the arrangement of multiple connecting members, a lower core, and an upper core according to a modified example 3 of the embodiment.Figure 19 shows an example of the arrangement of multiple connecting members, a lower core, and an upper core according to a modified example 4 of the embodiment.Figure 20 shows an example of the arrangement of multiple connecting members, a lower core, and an upper core according to modified example 5 of the embodiment.Figure 21 is a diagram showing an example of the arrangement of multiple connecting members, a lower core, and an upper core according to a modified example 6 of the embodiment. The embodiments of the semiconductor device disclosed herein will be described in detail below with reference to the drawings. However, the disclosed technology is not limited by these embodiments. (Embodiment) Figure 1 is a diagram showing the configuration of a semiconductor device 100 according to an embodiment. In Figure 1, a schematic cross-section of the semiconductor device 100 is shown. For convenience, in the following, the direction from the first wiring board 110 toward the second wiring board 120 will be defined as the upward direction, and the direction from the second wiring board 120 toward the first wiring board 110 will be defined as the downward direction, and the vertical direction of the semiconductor device 100 will be defined accordingly. However, the semiconductor device 100 may be manufactured and used upside down, for example, or may be manufactured and used in any orientation. The semiconductor device 100 shown in Figure 1 has a stacked first wiring board 110 and a second wiring board 120, and has a sealing resin 101 that covers an electronic component 140 sandwiched between the first wiring board 110 and the second wiring board 120. Specifically, the semiconductor device 100 is constructed by connecting the first wiring board 110 and the second wiring board 120 with a plurality of connecting members 130. An electronic component 140 is mounted on the upper surface of the first wiring board 110, and this electronic compo