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JP-2026074643-A - High-frequency switch circuits, high-frequency modules, and communication devices

JP2026074643AJP 2026074643 AJP2026074643 AJP 2026074643AJP-2026074643-A

Abstract

[Problem] To provide a high-frequency switch circuit that can reduce the generation of reflected waves by high-frequency signals coming from an external terminal when the charge pump is stopped. [Solution] The high-frequency switch circuit 1 includes a common terminal 2, a first input/output terminal 3, a first series FET 5, a first parallel FET 6, a charge pump 11, a voltage supply path 12, a first switch SW1, and a second switch SW2. The first series FET 5 is connected to the common terminal 2 and the first input/output terminal 3 in the first signal path L1. The first parallel FET 6 is connected between the signal path L12 and ground. The voltage supply path 12 is connected to a connection node N1 to which the output section 11b of the charge pump 11 and the control electrode of the first series FET 5 are connected. The first switch SW1 is provided in the first path M1 connecting the first output section 11b of the charge pump 11 and the connection node N1. The second switch SW2 is provided in the voltage supply path 12. [Selection Diagram] Figure 2

Inventors

  • 森河 直樹

Assignees

  • 株式会社村田製作所

Dates

Publication Date
20260507
Application Date
20241021

Claims (9)

  1. Common terminal and A first input/output terminal connected to the common terminal via a first signal path, A first series FET connected to the common terminal and the first input/output terminal in the first signal path, A first parallel FET is connected between the signal path between the first input/output terminal and the first series FET and ground, A charge pump having an output section, which supplies a control voltage for controlling the first series FET and a control voltage for controlling the first parallel FET from the output section, A voltage source having a first output section and a second output section that supply voltage, and the second output section supplies the voltage to the charge pump, A voltage supply path connecting the first output section of the voltage source and the connection node to which the control electrode of the first series FET is connected, A first switch is provided in the first path connecting the output section of the charge pump and the connection node, and the first switch is provided in the first path for conducting and disconnecting the first path, The system includes a second switch provided in the voltage supply path for conducting and interrupting the voltage supply path, High-frequency switch circuit.
  2. The control electrode of the first parallel FET is connected to a path that connects the connection node and the control electrode of the first series FET. The high-frequency switch circuit according to claim 1.
  3. A second input/output terminal connected to the common terminal via a second signal path, In the second signal path, a second series FET is connected to the common terminal and the second input/output terminal, The system further comprises a second parallel FET connected between the signal path between the second input/output terminal and the second series FET and ground, The connection node is further connected to the control electrode of the second series FET. The high-frequency switch circuit according to claim 1 or 2.
  4. The charge pump supplies the control voltage based on the voltage from the voltage source. A high-frequency switch circuit according to any one of claims 1 to 3.
  5. The system further comprises a parallel FET connected between the common terminal and the ground. A high-frequency switch circuit according to any one of claims 1 to 4.
  6. The system further comprises a changeover switch including the first switch and the second switch, The changeover switch selectively connects one of the first path and the voltage supply path to the control electrode of the first series FET. A high-frequency switch circuit according to any one of claims 1 to 5.
  7. A first level shifter that controls the first series FET, The system further comprises a second level shifter for controlling the first parallel FET, The aforementioned first level shifter is The first input unit connected to the aforementioned connection node, A second input section connected to a negative voltage supply circuit, It has a first output unit connected to the control electrode of the first series FET, which selectively outputs the voltage input to the first input unit and the voltage input to the second input unit, The aforementioned second level shifter is The path between the output section of the charge pump and the first switch, or the third input section connected to the connection node, A fourth input unit connected to the aforementioned negative voltage supply circuit, It has a second output unit connected to the control electrode of the first parallel FET, which selectively outputs the voltage input to the third input unit and the voltage input to the fourth input unit. A high-frequency switch circuit according to any one of claims 1 to 5.
  8. A high-frequency switch circuit according to any one of claims 1 to 7, The high-frequency switch circuit comprises an electronic component connected between the first input/output terminal and the external terminal. High-frequency module.
  9. The high-frequency module according to claim 8, The system includes a signal processing circuit connected to the aforementioned high-frequency module for processing high-frequency signals. Communication device.

Description

This invention generally relates to high-frequency switch circuits, high-frequency modules, and communication devices, and more specifically, to a high-frequency switch circuit having a common terminal and input/output terminals, a high-frequency module equipped with the high-frequency switch circuit, and a communication device equipped with the high-frequency module. The positive/negative potential generation circuit described in Patent Document 1 comprises a plurality of FETs and a power supply circuit that supplies voltage to the plurality of FETs. The power supply circuit includes a charge pump. When a predetermined FET among the plurality of FETs is turned on, the charge pump applies a positive voltage to the predetermined FET, and when the predetermined FET is turned off, it applies a negative voltage to the predetermined FET. Japanese Patent Publication No. 2016-9938 Figure 1 is a configuration diagram of a high-frequency module and communication device according to Embodiment 1.Figure 2 is a diagram showing the configuration of the high-frequency switch circuit provided by the high-frequency module mentioned above.Figure 3 is a configuration diagram of a high-frequency switch circuit according to Embodiment 2.Figure 4 is a configuration diagram of a high-frequency switch circuit according to Embodiment 3. (1) Embodiment 1 The high-frequency switch circuit 1 according to Embodiment 1 will be described in detail with reference to the drawings. (1-1) Overview As shown in Figure 2, the high-frequency switch circuit 1 according to Embodiment 1 includes a common terminal 2, a first input/output terminal 3, a first series FET (Field Effect Transistor) 5, a first parallel FET 6, a charge pump 11, a voltage source 10, a voltage supply path 12, a first switch SW1, and a second switch SW2. The first input/output terminal 3 is connected to the common terminal 2 via a first signal path L1. The first series FET 5 is connected to the common terminal 2 and the first input/output terminal 3 in the first signal path L1. The first parallel FET 6 is connected between the signal path L12 between the first input/output terminal 3 and the first series FET 5 and ground. The charge pump 11 has a first output section 11b (output section). From the first output section 11b, the charge pump 11 supplies a control voltage for controlling the first series FET 5 and a control voltage for controlling the first parallel FET 6. The voltage source 10 has a first output section 10a and a second output section 10b, which supply voltages, respectively. The voltage source 10 supplies the above voltage to the charge pump 11 from the second output section 10b. The voltage supply path 12 connects the first output section 10a of the voltage source 10 to the connection node N1 to which the control electrode of the first series FET 5 is connected. The first switch SW1 is provided in the first path M1 connecting the first output section 11b of the charge pump 11 to the connection node N1, and controls the conduction and disconnection of the first path M1. The second switch SW2 is provided in the voltage supply path 12, and controls the conduction and disconnection of the voltage supply path 12. With this configuration, when the charge pump 11 is stopped, the first switch SW1 blocks the first path M1 and the second switch SW2 opens the voltage supply path 12. This applies the voltage (power supply voltage) applied to the voltage supply path 12 to the control electrode of the first series FET 5, switching the first series FET 5 to an ON state with sufficiently low conduction resistance. Therefore, when the charge pump 11 is stopped and a high-frequency signal entering the common terminal 2 from an external terminal passes through the first series FET 5, the generation of reflected waves of the high-frequency signal due to the conduction resistance of the first series FET 5 can be reduced. As a result, the degradation of the external terminal's receiving sensitivity due to the reflected waves returning to the external terminal can be reduced. (1-2) Communication device Referring to Figure 1, an example of the configuration of a communication device 30 that includes a high-frequency module 31 containing a high-frequency switch circuit 1 will be described. As shown in Figure 1, the communication device 30 is a communication device equipped with a high-frequency module 31. The communication device 30 is, for example, a mobile terminal (e.g., a smartphone), but is not limited to a mobile terminal; it may also be, for example, a wearable device (e.g., a smartwatch). The high-frequency module 31 is, for example, a module compatible with 4G (fourth-generation mobile communication) and 5G (fifth-generation mobile communication) standards. The 4G standard is, for example, 3GPP (registered trademark, Third Generation Partnership Project) or the LTE standard. The 5G standard is, for example, 5G NR (New Radio). The communication device 30 further includes a si