JP-2026074733-A - Photodetector, electronic device, and control method for photodetector

JP2026074733AJP 2026074733 AJP2026074733 AJP 2026074733AJP-2026074733-A

Abstract

[Problem] To provide a light detection device, electronic device, and control method for a light detection device that accurately focus on a stationary object using an event signal while taking a photograph of it. [Solution] One aspect of the present disclosure of a light detection device includes: a light receiving unit that converts incident light into an electrical signal by photoelectric conversion; a conversion circuit that converts the electrical signal into a voltage signal; a first buffer circuit that outputs a first detection signal corresponding to the voltage signal; a second buffer circuit that outputs a second detection signal corresponding to an arbitrary first pseudo signal that is independent of the voltage signal; and a subtractor that outputs a first output signal when the first or second detection signal exceeds a first threshold voltage higher than the first or second detection signal, and outputs a second output signal when the first or second detection signal falls below a second threshold voltage lower than the first or second detection signal. [Selection Diagram] Figure 8

Inventors

北野伸

Assignees

ソニーセミコンダクタソリューションズ株式会社

Dates

Publication Date: 20260507
Application Date: 20241021

Claims (18)

A light receiving unit that converts incident light into electrical signals, A conversion circuit that converts the aforementioned electrical signal into a voltage signal, A first buffer circuit that outputs a first detection signal corresponding to the voltage signal, A second buffer circuit that outputs a second detection signal corresponding to an arbitrary first pseudo signal independent of the voltage signal, A photodetector comprising: a first output signal output when the first or second detection signal exceeds a first threshold voltage higher than the first or second detection signal, and a subtractor outputting a second output signal when the first or second detection signal falls below a second threshold voltage lower than the first or second detection signal.
When the first buffer circuit outputs the first detection signal, the second buffer circuit does not output the second detection signal. The photodetector according to claim 1, wherein when the second buffer circuit outputs the second detection signal, the first buffer circuit does not output the first detection signal.
The subtractor includes a first comparator that outputs the first output signal and a second comparator that outputs the second output signal. A first capacitive element is provided between the outputs of the first and second buffer circuits and one input terminal of the first comparator, The device further comprises a second capacitive element provided between the outputs of the first and second buffer circuits and one input terminal of the second comparator, The first threshold voltage is applied to the other input terminal of the first comparator. The photodetector according to claim 1, wherein the second threshold voltage is applied to the other input terminal of the second comparator.
The system further includes current sources that supply a constant current to the first and second buffer circuits, The first buffer circuit is, A first transistor, which receives the voltage signal at its gate and has one end connected to a first voltage source, It includes a second transistor that receives a first selection signal at its gate, one end of which is connected to the other end of the first transistor, and the other end of which is connected to an output node, The second buffer circuit is, A third transistor, which receives the first pseudo-signal at its gate and has one end connected to the first voltage source, It includes a fourth transistor that receives a second selection signal at its gate, one end of which is connected to the other end of the third transistor, and the other end of which is connected to the output node, The photodetector according to claim 1, wherein the current source is connected to the output node.
The photodetector according to claim 1, wherein the voltage of the first pseudo-signal is constant.
The photodetector according to claim 1, wherein the voltage of the first pseudo-signal changes in steps.
The photodetector according to claim 1, wherein the voltage of the first pseudo-signal changes to cross the voltage signal.
The photodetector according to claim 1, wherein the voltage of the first pseudo-signal changes substantially linearly.
The light detection device according to claim 8, wherein, in the inspection, the second buffer circuit outputs the second detection signal to the subtractor.
The circuit further comprises a third buffer circuit that outputs a third detection signal corresponding to an arbitrary second pseudo-signal that is independent of the voltage signal, The photodetector according to claim 1, wherein the subtractor outputs a first output signal when one of the first to third detection signals selected exceeds the first threshold voltage, and outputs a second output signal when one of the first to third detection signals selected falls below the second threshold voltage.
When the first buffer circuit outputs the first detection signal, the second and third buffer circuits do not output the second and third detection signals. When the second buffer circuit outputs the second detection signal, the first and third buffer circuits do not output the first and third detection signals. The photodetector according to claim 10, wherein when the third buffer circuit outputs the third detection signal, the first and second buffer circuits do not output the first and third detection signals.
The subtractor includes a first comparator that outputs the first output signal and a second comparator that outputs the second output signal. A first capacitive element is provided between the output of the first to third buffer circuits and one input terminal of the first comparator, The device further comprises a second capacitive element provided between the outputs of the first to third buffer circuits and one of the input terminals of the second comparator, The first threshold voltage is applied to the other input terminal of the first comparator. The photodetector according to claim 10, wherein the second threshold voltage is applied to the other input terminal of the second comparator.
The system further includes a current source that supplies a constant current to the first to third buffer circuits, The first buffer circuit is, A first transistor, which receives the voltage signal at its gate and has one end connected to a first voltage source, It includes a second transistor that receives a first selection signal at its gate, one end of which is connected to the other end of the first transistor, and the other end of which is connected to an output node, The second buffer circuit is, A third transistor, which receives the first pseudo-signal at its gate and has one end connected to the first voltage source, It includes a fourth transistor that receives a second selection signal at its gate, one end of which is connected to the other end of the third transistor, and the other end of which is connected to the output node, The third buffer circuit described above is A fifth transistor receives the second pseudo-signal at its gate, and one end of the fifth transistor is connected to the first voltage source, It includes a sixth transistor that receives a third selection signal at its gate, one end of which is connected to the other end of the fifth transistor, and the other end of which is connected to the output node, The photodetector according to claim 10, wherein the current source is connected to the output node.
In the inspection, the second and third buffer circuits alternately output the second and third detection signals to the subtractor, as described in claim 10.
A light receiving unit that converts incident light into electrical signals, A conversion circuit that converts the aforementioned electrical signal into a voltage signal, A first buffer circuit that outputs a first detection signal corresponding to the voltage signal, A second buffer circuit that outputs a second detection signal corresponding to an arbitrary first pseudo signal independent of the voltage signal, An electronic device comprising a photodetector, which includes a subtractor that outputs a first output signal when the first or second detection signal exceeds a first threshold voltage higher than the first or second detection signal, and outputs a second output signal when the first or second detection signal falls below a second threshold voltage lower than the first or second detection signal.
When the first buffer circuit outputs the first detection signal, the second buffer circuit does not output the second detection signal. The electronic device according to claim 15, wherein when the second buffer circuit outputs the second detection signal, the first buffer circuit does not output the first detection signal.
The subtractor includes a first comparator that outputs the first output signal and a second comparator that outputs the second output signal. A first capacitive element is provided between the outputs of the first and second buffer circuits and one input terminal of the first comparator, The device further comprises a second capacitive element provided between the outputs of the first and second buffer circuits and one input terminal of the second comparator, The first threshold voltage is applied to the other input terminal of the first comparator. The electronic device according to claim 15, wherein the second threshold voltage is applied to the other input terminal of the second comparator.
A control method for a photodetector comprising: a light receiving unit that converts incident light into an electrical signal; a conversion circuit that converts the electrical signal into a voltage signal; a first buffer circuit; a second buffer circuit; and a subtractor, The first buffer circuit outputs a first detection signal corresponding to the voltage signal, or the second buffer circuit outputs a second detection signal corresponding to an arbitrary first pseudo-signal that is independent of the voltage signal. When the first or second detection signal exceeds a first threshold voltage higher than the first or second detection signal, a first output signal is output. A control method for a photodetector, comprising outputting a second output signal when the first or second detection signal falls below a second threshold voltage lower than the first or second detection signal.

Description

This disclosure relates to a photodetector, electronic equipment, and a method for controlling a photodetector. A light detection device has been developed that can detect event signals in real time when the light intensity of a pixel exceeds a threshold. Such a light detection device that detects event signals is called an EVS (Event Vision Sensor). An EVS is a sensor that detects changes in pixel brightness and outputs the changed data combined with coordinate and time information. Patent No. 7141440 A block diagram showing one example configuration of a light detection device according to the first embodiment.A figure showing an example of a stacked structure of a solid-state image sensor according to the first embodiment.An example of a plan view of a light-receiving chip.An example of a plan view of the pixel array section.An example of a plan view of a detection chip.An example of a plan view of the detection unit.A block diagram showing an example of the configuration of an event detection circuit.A circuit diagram showing an example of the configuration of an event detection circuit.A timing diagram showing an example of operation of the event detection circuit according to the first embodiment.A timing diagram showing an example of the operation of the event detection circuit according to the second embodiment.A timing diagram showing an example of the operation of an event detection circuit according to the third embodiment.A circuit diagram showing an example of the configuration of an event detection circuit according to the fourth embodiment.A timing diagram showing an example of operation of the event detection circuit according to the fourth embodiment.A diagram showing an example of a comparator configuration.A diagram showing an example of a subtractor configuration.A block diagram showing an example of a general configuration of a vehicle control system.An explanatory diagram showing an example of the installation location of the external information detection unit and the imaging unit. The following describes specific embodiments of this technology in detail with reference to the drawings. The drawings are schematic or conceptual, and the proportions of each part may not necessarily be identical to those of actual objects. In the specification and drawings, elements similar to those described above are denoted by the same reference numerals, and detailed explanations are omitted where appropriate. (First Embodiment) Figure 1 is a block diagram showing an example configuration of a light detection device 1 according to the first embodiment. The light detection device 1 is, for example, an EVS or DVS (Dynamic Vision Sensor). The light detection device 1 comprises an imaging lens 10, a solid-state image sensor 20, a recording area 30, and a control unit 40. Examples of the light detection device 1 include electronic devices such as cameras mounted on industrial robots, in-vehicle cameras, and surveillance cameras. The imaging lens 10 focuses the incident light and guides it to the solid-state image sensor 20. The solid-state image sensor 20 converts the incident light into photoelectric energy to generate a voltage signal corresponding to the amount of light received, and detects changes in the amount of light received as an event signal based on the change in the voltage signal. The detected event signal is output to the recording area 30. The recording area 30 records event signals from the solid-state image sensor 20. The recording area 30 may be, for example, a latch circuit, DRAM (Dynamic Random Access Memory), flash memory, or other semiconductor memory. The internal configuration of the recording area 30 will be explained in more detail later. The control unit 40 is configured with a microcomputer, for example, equipped with a CPU (Central Processing Unit), ROM (Read Only Memory), RAM, etc. The CPU controls the operation of the light detection device 1 by executing processing according to a program. In particular, the control unit 40 controls the solid-state image sensor 20 to perform the event signal detection operation described above, controls the recording area 30 to record the event signal, and performs processing to read the event signal from the recording area 30. Figure 2 shows an example of a stacked structure of a solid-state image sensor 20 according to the first embodiment. The solid-state image sensor 20 comprises a detection chip 202 and a light-receiving chip 201 stacked on the detection chip 202. In such a stacked structure, the light-receiving chip 201 and the detection chip 202 are electrically connected via connection points such as vias. In addition to vias, connections can also be made using Cu-Cu junctions or bumps. Figure 3 is an example of a plan view of the light-receiving chip 201. The light-receiving chip 201 includes a pixel array section 220 and via arrangement sections 211, 212, and 213. Vias connected to the detection chip 202 are arranged in the via arr