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JP-2026075556-A - Array-type multilayer ceramic capacitors for embedded packages

JP2026075556AJP 2026075556 AJP2026075556 AJP 2026075556AJP-2026075556-A

Abstract

[Problem] To provide an array-type multilayer ceramic capacitor. [Solution] A multilayer ceramic capacitor array comprising: a ceramic body having an upper surface, a lower surface, and a first end surface and a second end surface facing each other; a plurality of internal electrode groups including a plurality of first internal electrodes and a plurality of second internal electrodes that extend from the first and second end surfaces and are arranged alternately to each other, wherein each of the first and second internal electrodes includes first to fourth side surfaces that are connected in order, and the plurality of internal electrode groups including a first portion that is exposed from the upper surface, the first end surface or the second end surface and the lower surface, and a second portion that is not exposed; and a plurality of end electrode pairs provided corresponding to the internal electrode groups, each including a first end electrode and a second end electrode, wherein the first and second end electrodes extend to cover the first to third side surfaces of the first portion of the first and second internal electrodes, respectively. [Selection Diagram] Figure 1

Inventors

  • 呉 明駿
  • 劉 ▲キン▼▲彦▼
  • ▲温▼惠怡

Assignees

  • ヤゲオ コーポレーション

Dates

Publication Date
20260508
Application Date
20250124
Priority Date
20241022

Claims (10)

  1. A ceramic body having an upper surface, a lower surface, and a first end surface and a second end surface located between the upper surface and the lower surface, facing each other, A plurality of internal electrode groups are fitted into the ceramic body, each physically separated from the others, and each group includes a plurality of first internal electrodes and a plurality of second internal electrodes, wherein in each of the plurality of internal electrode groups, the plurality of first internal electrodes and the plurality of second internal electrodes are alternately and physically separated from each other, the plurality of first internal electrodes extend from the first end face toward the second end face and are separated from the second end face, the plurality of second internal electrodes extend from the second end face toward the first end face and are separated from the first end face, and each of the plurality of first internal electrodes and the plurality of second internal electrodes is It includes a first side, a second side, a third side, and a fourth side that are connected in order, and the first side, the second side, and the third side each have a first portion that is exposed from the top surface, the first end surface or the second end surface, and the bottom surface, A plurality of internal electrode groups, including a second portion which is joined to the fourth side surface of the first portion and is completely fitted into the ceramic body without being exposed, Laminated bricks including, Each of the following pairs of end electrodes is provided corresponding to the plurality of internal electrode groups and spaced apart from each other, and each includes a first end electrode and a second end electrode, wherein the first end electrode extends to cover the first side, second side, and third side of the first portion of each of the plurality of first internal electrodes of the corresponding plurality of internal electrode groups, and the second end electrode extends to cover the first side, second side, and third side of the first portion of each of the plurality of second internal electrodes, An array-type multilayer ceramic capacitor equipped with [a specific feature].
  2. The array-type multilayer ceramic capacitor according to claim 1, wherein the plurality of internal electrode groups includes the same number of the plurality of first internal electrodes and the same number of the plurality of second internal electrodes.
  3. The array-type multilayer ceramic capacitor according to claim 1, wherein the plurality of internal electrode groups include a different number of the plurality of first internal electrodes and a different number of the plurality of second internal electrodes.
  4. The array-type multilayer ceramic capacitor according to claim 1, wherein some of the plurality of internal electrode groups include the same number of the plurality of first internal electrodes and the same number of the plurality of second internal electrodes, and the number of the plurality of first internal electrodes and the number of the plurality of second internal electrodes in each internal electrode group of another subset of the plurality of internal electrode groups are different from those in the subset of the plurality of internal electrode groups.
  5. The array-type multilayer ceramic capacitor according to claim 1, wherein the plurality of internal electrode groups are divided into a plurality of groups, and each of the plurality of internal electrode groups in the plurality of groups includes the same number of the plurality of first internal electrodes and the same number of the plurality of second internal electrodes.
  6. The array-type multilayer ceramic capacitor according to claim 5, wherein each of the plurality of internal electrode groups in each of the plurality of groups, and each of the plurality of internal electrode groups in any other of the plurality of groups, includes a different number of the plurality of first internal electrodes and a different number of the plurality of second internal electrodes.
  7. The array-type multilayer ceramic capacitor according to claim 1, wherein the first and second end electrodes of each of the plurality of end electrode pairs both include a plated copper structure.
  8. The array-type multilayer ceramic capacitor according to claim 1, wherein the shape of each of the plurality of first internal electrodes and each of the plurality of second internal electrodes is substantially T-shaped.
  9. The array-type multilayer ceramic capacitor according to claim 1, wherein the plurality of internal electrode groups, the plurality of end electrode pairs, and the plurality of portions of the ceramic body each constitute a plurality of capacitor units, and the architecture of the plurality of capacitor units is the same as that of the plurality of capacitor units.
  10. The array-type multilayer ceramic capacitor according to claim 1, wherein the plurality of internal electrode groups, the plurality of end electrode pairs, and the plurality of portions of the ceramic body each constitute a plurality of capacitor units, and the architectures of the plurality of capacitor units are different from each other.

Description

This disclosure relates to manufacturing technology for passive elements, and more particularly to array-type multilayer ceramic capacitors. Conventional technology The architecture of a multilayer ceramic capacitor may include a laminated brick and two end electrodes coated on both ends of the laminated brick. Currently, the end electrodes are often fabricated by applying a metal solution to each end of the laminated brick to form a first metal layer, followed by plating with other metal layers favorable for welding. However, using such end electrode fabrication techniques in the production of array-type multilayer ceramic capacitors limits the copper paste application process, thus failing to meet the miniaturization needs of array-type multilayer ceramic capacitors. Furthermore, the end electrodes formed in this manner have high surface roughness and poor thickness uniformity. When multilayer ceramic capacitors are embedded and mounted in a package architecture, the high surface roughness and low thickness uniformity of the end electrodes reduce the reliability of the junction between the end electrodes and the intermediate windows of the connecting end electrodes and other layers of the package structure, and further affect the package yield. The aspects of this disclosure will be better understood by referring to the attached drawings below for a more detailed explanation. Note that, in accordance with standard industry practice, each feature is not depicted proportionally. In fact, for the sake of clarity in the discussion, the size of each feature can be arbitrarily increased or decreased. This is a schematic perspective view showing an array-type multilayer ceramic capacitor according to a first embodiment of the present disclosure. This is a schematic side view showing an array-type multilayer ceramic capacitor according to a first embodiment of the present disclosure. This is a schematic perspective view showing the laminated bricks of an array-type multilayer ceramic capacitor according to the first embodiment of this disclosure. This is a schematic perspective view showing the laminated bricks of an array-type multilayer ceramic capacitor according to the first embodiment of this disclosure. This is a schematic side view showing the first internal electrode according to the first embodiment of the present disclosure. This is a schematic side view showing a second internal electrode according to a first embodiment of the present disclosure. This is a schematic top view showing an array-type multilayer ceramic capacitor according to a second embodiment of the present disclosure. This is a schematic top view showing an array-type multilayer ceramic capacitor according to a third embodiment of the present disclosure. This is a schematic top view showing an array-type multilayer ceramic capacitor according to a fourth embodiment of the present disclosure. The embodiments of this disclosure will be discussed in detail below. However, as can be understood, the embodiments provide many applicable concepts that can be implemented in various specific contexts. The embodiments discussed and disclosed are for illustrative purposes only and are not intended to limit the scope of this disclosure. All embodiments of this disclosure disclose various different features, which may be implemented individually or in combination, depending on the needs. Furthermore, the terms "first," "second," etc., used in this specification do not necessarily imply any order or rank, but are used solely to distinguish between elements or operations described using the same technical terminology. The spatial relationship between the two elements described in this disclosure applies not only to the orientations shown in the drawings, but also to orientations not shown in the drawings, such as the inverted orientation. Furthermore, the terms "connection," "electrical connection," or similar terms used in this disclosure between two components are not limited to direct or electrical connections, but may include indirect or electrical connections as necessary. This disclosure may integrate multiple capacitor units within a laminated brick to meet various application needs. These multiple capacitor units may have the same capacitance value or different capacitance values, or some capacitor units may have the same capacitance value while others have different capacitance values. Please refer to Figures 1 to 4. These are perspective schematics and side schematics showing an array-type multilayer ceramic capacitor 100 according to the first embodiment of this disclosure, and perspective schematics and perspective schematics showing the laminated bricks 200 of the array-type multilayer ceramic capacitor 100, respectively. The array-type multilayer ceramic capacitor 100 is integrated by a plurality of capacitor units arranged in an array. The array-type multilayer ceramic capacitor 100 mainly includes the laminated bricks 200 and a pluralit