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JP-2026075863-A - Quantum computing device, information processing device, lattice surgery method, and program

JP2026075863AJP 2026075863 AJP2026075863 AJP 2026075863AJP-2026075863-A

Abstract

[Problem] To improve the throughput of lattice surgery in quantum computing. [Solution] A quantum computing device comprises a first layer having a plurality of qubits arranged two-dimensionally and a first cell as a repeating unit, and a second layer having a plurality of qubits arranged two-dimensionally and a second cell of approximately the same size as the first cell as a repeating unit, wherein the number of qubits in the second cell is smaller than the number of qubits in the first cell, and lattice surgery between the two first cells is performed using only the first layer, or using the first layer and the second layer. [Selection Diagram] Figure 15

Inventors

  • 鈴木 泰成
  • 上野 洋典
  • 田渕 豊
  • 玉手 修平

Assignees

  • ＮＴＴ株式会社
  • 国立研究開発法人理化学研究所

Dates

Publication Date
20260511
Application Date
20241023

Claims (7)

  1. Multiple qubits are arranged in two dimensions, and the first layer has a repeating unit of the first cell, The system comprises a second layer having a repeating unit of second cells, each being approximately the same size as the first cell, in which multiple qubits are arranged in two dimensions, A quantum computing device in which the number of qubits in the second cell is smaller than the number of qubits in the first cell, and lattice surgery between the two first cells is performed using only the first layer, or using the first and second layers.
  2. The quantum computing apparatus according to claim 1, wherein in the first layer, there is a first cell storing data, and in the second layer, there is no second cell storing data.
  3. The quantum computing apparatus according to claim 1, wherein each qubit in the second layer is coupled with the nearest qubit in the second layer, the upper right qubit, the upper left qubit, the lower right qubit, and the lower left qubit.
  4. An information processing device that performs calculations by transmitting control signals to quantum hardware, The aforementioned quantum hardware is Multiple qubits are arranged in two dimensions, and the first layer has a repeating unit of the first cell, The system comprises a second layer having a repeating unit of second cells, each being approximately the same size as the first cell, in which multiple qubits are arranged in two dimensions, The aforementioned information processing device is An information processing device comprising a grid surgery processing unit that selects a path for performing grid surgery between two first cells using only the first layer, or using the first layer and the second layer.
  5. The information processing apparatus according to claim 4, wherein the grid surgery processing unit selects the path by searching for a path of empty cells connecting two first cells to the first layer and the second layer.
  6. A lattice surgery method performed by an information processing device that performs calculations by transmitting control signals to quantum hardware, The aforementioned quantum hardware is Multiple qubits are arranged in two dimensions, and the first layer has a repeating unit of the first cell, The system comprises a second layer having a repeating unit of second cells, each being approximately the same size as the first cell, in which multiple qubits are arranged in two dimensions, The aforementioned information processing device is A grid surgery method for selecting a path to perform grid surgery between two first cells using only the first layer, or using the first layer and the second layer.
  7. A program for causing a computer to function as a grid surgery processing unit in the information processing apparatus described in claim 4 or 5.

Description

This invention relates to the technology of fault-tolerant quantum computers. A quantum computer is a technology that performs calculations by utilizing the superposition principle of quantum mechanics. Because quantum computers are expected to solve problems such as prime factorization and quantum chemical calculations at high speed, their development is being actively pursued worldwide. The (classical) bits, which are elements that make up a classical computer, take values of 0 or 1. On the other hand, qubits, which are the elements that make up a quantum computer, can exist in a continuous superposition state of 0 and 1, in addition to being either 0 or 1. Using this superposition state, it is possible to simultaneously perform calculations for both the case where the qubit's value is 0 and the case where it is 1. However, when a qubit is observed, its value becomes fixed as either 0 or 1, and the superposition state is broken. Because qubits are prone to errors, these errors need to be corrected in order to advance calculations in a quantum computer. However, due to the aforementioned properties of qubits, it is not possible to directly observe them to check for errors, as is the case with conventional classical bits. Therefore, a framework called quantum error correction coding has been proposed, which involves encoding multiple physical qubits with different roles to constitute a single logical qubit. Surface coding is known as one of the representative quantum error correction codes (Non-Patent Literature 1). Performing operations with logical qubits encoded with surface coding requires error correction during the operation. A typical approach to solving this is to appropriately change the error correction pattern to alter the encoded quantum state. In particular, lattice surgery is known as a framework for performing operations on two or more encoded logical qubits (Non-Patent Literature 2). Furthermore, by using the method disclosed in Non-Patent Document 3, almost all quantum computations can be performed solely through lattice surgery. Therefore, when operating a quantum computer as efficiently as possible, it is crucial to maximize the throughput of lattice surgery performed per unit time. Fowler, Austin G., et al. "Surface codes: Towards practical large-scale quantum computation." Physical Review A 86.3 (2012): 032324.Horsman, Dominic, et al. "Surface code quantum computing by lattice surgery." New Journal of Physics 14.12 (2012): 123011.Tremblay, M. A., Delfosse, N., & Beverland, M. E. (2022). Constant-overhead quantum error correction with thin planar connectivity. Physical Review Letters, 129(5), 050504.Bravyi, S., Cross, A. W., Gambetta, J. M., Maslov, D., Rall, P., & Yoder, T. J. (2023). High-threshold and low-overhead fault-tolerant quantum memory. arXiv preprint arXiv:2308.07915.Duckering, C., Baker, J. M., Schuster, D. I., & Chong, F. T. (2020, October). Virtualized logical qubits: A 2.5 d architecture for error-corrected quantum computing. In 2020 53rd Annual IEEE/ACM International Symposium on Microarchitecture (MICRO) (pp. 173-185). IEEE. This figure shows an example of the configuration of a quantum computer.This is a diagram showing four qubits.This diagram shows a 2-layer structure with 8 qubits.This figure shows an example of a surface code.This figure shows an example of path interference.This figure shows an example of path interference.This figure shows an example of a configuration that includes a qubit layer and a wiring layer.This is a diagram showing a qubit layer.This diagram shows the arrangement of qubits in the wiring layer.This diagram shows the coupling pattern in the wiring layer.This diagram shows the connections spanning between the wiring layer and the qubit layer.This diagram shows an example of the specific procedure for lattice surgery.This diagram shows the qubit layer and the wiring layer.This figure shows the case where lattice surgery is performed using only a qubit layer.This diagram shows a case where a wiring layer is used for grid surgery.This diagram shows an image of a qubit layer and a wiring layer superimposed on each other.This diagram shows a pattern of connections in the vertical direction.This diagram shows the connection relationship between the qubit layer and the wiring layer in a pattern connected in the vertical direction.This diagram shows the connection relationships between qubits in the wiring layer in a pattern where connections are made vertically.This diagram illustrates connection patterns combining vertical and horizontal directions.This diagram illustrates connection patterns combining vertical and horizontal directions.This diagram illustrates connection patterns combining vertical and horizontal directions.This diagram illustrates connection patterns combining vertical and horizontal directions.This diagram illustrates a case where path interference occurs if there is no wiring layer, but does not occur if there is a wiring lay