JP-2026075978-A - Electronic component embedded wiring board and method for manufacturing an electronic component embedded wiring board

Abstract

[Problem] To provide a method for manufacturing a wiring board that can improve the quality of a wiring board with embedded electronic components. [Solution] The wiring board 100 with embedded electronic components has a build-up insulating layer 15B laminated on the upper side of the core substrate 11, a cavity 30 formed with a bottom surface at an intermediate position in the thickness direction of the build-up insulating layer 15B, and an electronic component 80 placed on the bottom surface of the cavity 30, which makes it easier for gas generated inside the insulating layer below the cavity 30 to escape to the outside. [Selection Diagram] Figure 1

Inventors

• 黒田 展久

Assignees

• イビデン株式会社

Dates

Publication Date

20260511

Application Date

20241023

Claims (9)

1. An insulating layer is laminated on the upper side of the core substrate, A cavity formed with a bottom surface at an intermediate position in the thickness direction of the insulating layer, An electronic component placed on the bottom surface of the cavity, A wiring board with built-in electronic components.
2. The wiring board with an embedded electronic component according to claim 1, The aforementioned electronic component is a wiring structure.
3. The wiring board with an embedded electronic component according to claim 1, The insulating layer is made of a resin that does not contain reinforcing material.
4. The wiring board with an embedded electronic component according to claim 1, Furthermore, the lower surface of the insulating layer has a lower insulating layer, The lower insulating layer is made of a resin that does not contain reinforcing material.
5. The wiring board with an embedded electronic component according to claim 1, Furthermore, it has an upper insulating layer laminated on the upper surface of the insulating layer and the upper surface of the electronic component, The upper insulating layer is made of a resin that does not contain reinforcing material.
6. The wiring board with embedded electronic components according to claim 5, Furthermore, it includes a conductor layer laminated on the upper surface of the upper insulating layer, an electrode pad provided on the upper surface of the electronic component, and a via conductor connecting the conductor layer and the electrode pad, The electrode pad is located above the upper end of the cavity.
7. By laminating an insulating layer on the upper side of the core substrate, A cavity having a bottom surface is formed at an intermediate position in the thickness direction of the insulating layer, The electronic components are placed on the bottom surface of the cavity, A method for manufacturing a wiring board with embedded electronic components, including the method described above.
8. A method for manufacturing an electronic component embedded wiring board according to claim 7, The aforementioned electronic component is a wiring structure.
9. A method for manufacturing an electronic component embedded wiring board according to claim 7, The insulating layer is made of a resin that does not contain reinforcing material.

Description

The technology disclosed herein relates to an electronic component embedded wiring board and a method for manufacturing an electronic component embedded wiring board. Patent Document 1 describes an electronic component-embedded wiring board in which electronic components are housed in cavities of build-up layers. The cavities are formed as openings by irradiating a build-up laminate, which is composed of stacked build-up layers containing multiple insulating layers, with laser light. A stopper layer for laser light is positioned at the bottom of the cavity within the build-up laminate. The stopper layer is stacked on the internal insulating layers constituting the build-up laminate. The upper surface of the stopper layer forms the bottom surface of the cavity. The electronic components are positioned on the upper surface of the stopper layer, that is, on the bottom surface of the cavity via the stopper layer. Japanese Patent Publication No. 2006-19441 This is a cross-sectional view showing an electronic component embedded wiring board according to an embodiment of the present disclosure.This is a cross-sectional view showing an example of the manufacturing process for an electronic component embedded wiring board according to an embodiment of the present disclosure.This is a cross-sectional view showing an example of the manufacturing process for an electronic component embedded wiring board according to an embodiment of the present disclosure.This is a partially enlarged cross-sectional view showing an example of the manufacturing process for an electronic component embedded wiring board according to an embodiment of the present disclosure.This is a partially enlarged cross-sectional view showing an example of the manufacturing process for an electronic component embedded wiring board according to an embodiment of the present disclosure.This is a partially enlarged cross-sectional view showing an example of the manufacturing process for an electronic component embedded wiring board according to an embodiment of the present disclosure.This is a partially enlarged cross-sectional view showing an example of the manufacturing process for an electronic component embedded wiring board according to an embodiment of the present disclosure.This is a partially enlarged cross-sectional view showing an example of the manufacturing process for an electronic component embedded wiring board according to an embodiment of the present disclosure.This is a partially enlarged cross-sectional view showing an example of the manufacturing process for an electronic component embedded wiring board according to an embodiment of the present disclosure.This is a partially enlarged cross-sectional view showing an example of the manufacturing process for an electronic component embedded wiring board according to an embodiment of the present disclosure.This is a partially enlarged cross-sectional view showing an example of the manufacturing process for an electronic component embedded wiring board according to an embodiment of the present disclosure.This is a partially enlarged cross-sectional view showing an example of the manufacturing process for an electronic component embedded wiring board according to an embodiment of the present disclosure. An example of an embodiment of this disclosure will be described in detail below with reference to the drawings. Furthermore, the wiring board manufactured by the wiring board manufacturing method described herein is an electronic component-embedded wiring board that contains electronic components internally. Hereinafter, an electronic component-embedded wiring board will simply be referred to as a wiring board. Figure 1 is a cross-sectional view showing a wiring board 100 manufactured by a wiring board manufacturing method of one embodiment of the present disclosure. The wiring board 100 is an example of an electronic component embedded wiring board of the present disclosure. Of the two surfaces of the wiring board 100 in the thickness direction, the upper surface in Figure 1 is designated as the first surface 100F, and the lower surface as the second surface 100B. Furthermore, for convenience, the first surface 100F may be referred to as the upper side and the second surface 100B as the lower side in the following explanation. However, the orientation of the wiring board 100 in each drawing does not restrict the actual usage of the wiring board 100. As shown in Figure 1, the wiring board 100 has a main substrate 10. Furthermore, the main substrate 10 has a core substrate 11, a plurality of build-up insulating layers 15, and a plurality of build-up conductor layers 16. The build-up insulating layers are an example of "build-up layers" in the technology of this disclosure. The core substrate 11 is located in the central part of the wiring board 100 in the thickness direction. Multiple build-up insulating layers 15 and multiple build-up conductive layers 16 are laminated on the upper and lower